AS9C25256M2018L - 2.5V 512/256K x 18 Synchronous Dual-port SRAM

Product Overview

Alliance Semiconductor Corporation

Datasheet Details

Part number	AS9C25256M2018L
Manufacturer	Alliance Semiconductor Corporation
File Size	1.12 MB
Description	2.5V 512/256K x 18 Synchronous Dual-port SRAM
Datasheet	AS9C25256M2018L Datasheet
Additional preview pages of the AS9C25256M2018L datasheet.

Product details

Description

The AS9C25512M2018L/AS9C25256M2018L is a high-speed CMOS 9/4.5-Mbit synchronous Dual-Port Static Random Access Memory device, organized as 524,288/262,144 × 18 bits.

Features

True Dual-Port memory cells that allow simultaneous access of the same memory location.
Organisation: 524,288/262,144 × 18[1].
Fully Synchronous, independent operation on both ports.
Selectable Pipeline or Flow-Through output mode.
Fast clock speeds in Pipeline output mode: 250 MHz operation (9Gbps bandwidth).
Fast clock to data access: 2.8ns for Pipeline output mode.
Asynchronous output enable control.
Fast OE access times.

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Other Datasheets by Alliance Semiconductor Corporation

AS9C25256M2036L - 2.5V 256/128K X 36 Synchronous Dual-port SRAM
AS9C25128M2036L - 2.5V 256/128K X 36 Synchronous Dual-port SRAM
AS9C25512M2018L - 2.5V 512/256K x 18 Synchronous Dual-port SRAM

Published: Feb 11, 2011 |