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Altera

AN-426 Datasheet Preview

AN-426 Datasheet

Analog Keyboard Encoder

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Using MAX II CPLDs as
Analog Keyboard Encoders
July 2006, Version 1.0
Application Note 426
Introduction
Keyboard encoders are a very common application for CPLDs. Typically
a processor, ASSP, or ASIC does not have enough pins for keypads or
keyboards. I/O expansion is a very common function for CPLDs and
allows a processor to decode a very large keyboard with very few I/Os.
Even though CPLDs like MAX® and MAX® II may have abundant
low-cost I/Os, decoding a keypad or keyboard with one I/O per switch
is not desirable. The advantage of decoding a keyboard with fewer wires
is that it reduces the number of wires going from a keypad to a main
circuit board or it reduces the complexity of a switch matrix in the
keyboard assembly. This application note explains how the resources of a
MAX II device can be used to decode a very large number of switches in
a keypad or keyboard with only two I/Os and a GND pin. The decoding
approach used works for as few as 4 switches and as many as 48 switches.
Keyboard
Decode Methods
The most common way to encode a switch with a CPLD is by using a
simple circuit that ties one end of the switch to GND and the other terminal
to VCC through a pull-up resistor, typically 10 KΩ. The switch and
resistor node are connected to any CPLD input pin. For a pushbutton
normally-open Single Pole, Single Throw (SPST) switch, the CPLD input
is normally a logic one and is a logic zero when the switch is pressed.
Figure 1 shows the circuit for a simple one CPLD I/O per switch hookup.
You can enhance this circuit by using a Schmitt trigger input buffer
available in the MAX II device. The Schmitt trigger input reduces
switching noise and makes switch debounce easier. Refer to AN 422:
Power Management in Portable Systems Using MAX II CPLDs to learn how
to integrate a power-up and power-down mechanism into the switch
decode circuit.
Altera Corporation
AN-426-1.0
1
Preliminary




Altera

AN-426 Datasheet Preview

AN-426 Datasheet

Analog Keyboard Encoder

No Preview Available !

Using MAX II CPLDs as Analog Keyboard Encoders
www.datasheet4u.com
Figure 1. Simple One CPLD I/O per Switch Circuit
VCC
R1 VVCCCCIOI,OVC, CVINCITCINIT
10K
ApAppplilcicaattiioonn
R2 LLooggiicc
10K
MAX II CPLD
MAX II CPLD
GGNNDD
A common way to reduce the number of CPLD pins needed to decode a
large switch keyboard is to connect the switches in a row-and-column
matrix. With this approach, an array of M × N switches is decoded with
only M + N CPLD pins. An example is a 16-switch calculator keypad that
is made into a 4x4 array and requires only 8 pins. This is half the number
of pins required compared to the simple one-pin-per-switch approach.
2
Preliminary
Altera Corporation


Part Number AN-426
Description Analog Keyboard Encoder
Maker Altera
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