EP2S30
feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC operating conditions, AC timing parameters, a reference to power consumption, and ordering information for Stratix II devices.
This section contains the following chapters:
- Chapter 1, Introduction
- Chapter 2, Stratix II Architecture
- Chapter 3, Configuration & Testing
- Chapter 4, Hot Socketing & Power-On Reset
- Chapter 5, DC & Switching Characteristics
- Chapter 6, Reference & Ordering Information
Revision History
Refer to each chapter for its own specific revision history. For information on when each chapter was updated, refer to the Chapter Revision Dates section, which appears in the full handbook.
Altera Corporation
Section I- 1
Stratix II Device Family Data Sheet
Stratix II Device Handbook, Volume 1
Section I- 2
Altera Corporation
1. Introduction
SII51001-4.2
Introduction
Features
Altera Corporation May 2007
The Stratix® II FPGA family is based on a...
