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Altera

EPF10K20 Datasheet Preview

EPF10K20 Datasheet

Embedded Programmable Logic Device

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January 2003, ver. 4.2
Includes
FLEX 10KA
FLEX 10K
® Embedded Programmable
Logic Device Family
Data Sheet
Features...
The industry’s first embedded programmable logic device (PLD)
family, providing System-on-a-Programmable-Chip (SOPC)
integration
– Embedded array for implementing megafunctions, such as
efficient memory and specialized logic functions
– Logic array for general logic functions
High density
– 10,000 to 250,000 typical gates (see Tables 1 and 2)
– Up to 40,960 RAM bits; 2,048 bits per embedded array block
(EAB), all of which can be used without reducing logic capacity
System-level features
– MultiVoltTM I/O interface support
– 5.0-V tolerant input pins in FLEX® 10KA devices
– Low power consumption (typical specification less than 0.5 mA
in standby mode for most devices)
– FLEX 10K and FLEX 10KA devices support peripheral
component interconnect Special Interest Group (PCI SIG) PCI
Local Bus Specification, Revision 2.2
– FLEX 10KA devices include pull-up clamping diode, selectable
on a pin-by-pin basis for 3.3-V PCI compliance
– Select FLEX 10KA devices support 5.0-V PCI buses with eight or
fewer loads
– Built-in Joint Test Action Group (JTAG) boundary-scan test
(BST) circuitry compliant with IEEE Std. 1149.1-1990, available
without consuming any device logic
Table 1. FLEX 10K Device Features
Feature
Typical gates (logic and RAM) (1)
Maximum system gates
Logic elements (LEs)
Logic array blocks (LABs)
Embedded array blocks (EABs)
Total RAM bits
Maximum user I/O pins
EPF10K10
EPF10K10A
10,000
31,000
576
72
3
6,144
150
EPF10K20
20,000
63,000
1,152
144
6
12,288
189
EPF10K30
EPF10K30A
30,000
69,000
1,728
216
6
12,288
246
EPF10K40
40,000
93,000
2,304
288
8
16,384
189
EPF10K50
EPF10K50V
50,000
116,000
2,880
360
10
20,480
310
Altera Corporation
DS-F10K-4.2
1




Altera

EPF10K20 Datasheet Preview

EPF10K20 Datasheet

Embedded Programmable Logic Device

No Preview Available !

FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Table 2. FLEX 10K Device Features
Feature
Typical gates (logic and
RAM) (1)
Maximum system gates
LEs
LABs
EABs
Total RAM bits
Maximum user I/O pins
EPF10K70
70,000
118,000
3,744
468
9
18,432
358
EPF10K100
EPF10K100A
100,000
158,000
4,992
624
12
24,576
406
EPF10K130V
130,000
211,000
6,656
832
16
32,768
470
EPF10K250A
250,000
310,000
12,160
1,520
20
40,960
470
Note to tables:
(1) The embedded IEEE Std. 1149.1 JTAG circuitry adds up to 31,250 gates in addition to the listed typical or maximum
system gates.
...and More
Features
– Devices are fabricated on advanced processes and operate with
a 3.3-V or 5.0-V supply voltage (see Table 3
– In-circuit reconfigurability (ICR) via external configuration
device, intelligent controller, or JTAG port
– ClockLockTM and ClockBoostTM options for reduced clock
delay/skew and clock multiplication
– Built-in low-skew clock distribution trees
– 100% functional testing of all devices; test vectors or scan chains
are not required
Table 3. Supply Voltages for FLEX 10K & FLEX 10KA Devices
5.0-V Devices
EPF10K10
EPF10K20
EPF10K30
EPF10K40
EPF10K50
EPF10K70
EPF10K100
3.3-V Devices
EPF10K10A
EPF10K30A
EPF10K50V
EPF10K100A
EPF10K130V
EPF10K250A
2 Altera Corporation


Part Number EPF10K20
Description Embedded Programmable Logic Device
Maker Altera
Total Page 30 Pages
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