EPM7032

Manufacturer: Altera

EPM7032 datasheet by Altera.

EPM7032 Datasheet Details

6.7 ® MAX 7000 Programmable Logic Device Family Data Sheet.

High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture
5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface ava
ISP circuitry patible with IEEE Std. 1532
Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices
Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S devices with 128 or more macrocells
plete EPLD family with logic densities ranging from 600 to 5,000 usable gates (see Tables 1 and 2)
5-ns pin-to-pin logic delays with up to 175.4-MHz counter frequencies (including interconnect)
PCI-pliant devices available
Open-drain output option in MAX 7000S devices
Programmable macrocell flipflops with individual clear, preset

Brand Logo	Part Number	Description	Other Manufacturers
	EPM7032AE	Programmable Logic Device	Altera Corporation
	EPM7032B	(EPM7000B) Programmable Logic Device	Altera Corporation

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