Description
MAX 7000 Programmable Logic Device Family Data Sheet.
Additional design entry and simulation support provided by EDIF 2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM), Verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, and VeriBest.
Programming support.
Altera’s Master Programming Unit (MPU) and programming hardware from third-party manufacturers program all MA.
Features
