EPF10K50S Key Features
- Enhanced embedded array for implementing megafunctions such as efficient memory and specialized logic functions
- Dual-port capability with up to 16-bit width per embedded array block (EAB)
- Logic array for general logic functions High density
- 30,000 to 200,000 typical gates (see Tables 1 and 2)
- Up to 98,304 RAM bits (4,096 bits per EAB), all of which can be used without reducing logic capacity System-level featur
- MultiVoltTM I/O pins can drive or be driven by 2.5-V, 3.3-V, or 5.0-V devices
- Low power consumption
- Bidirectional I/O performance (tSU and tCO) up to 212 MHz
- Fully pliant with the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2 for 3.3-V operation
- 1 speed grade devices are pliant with PCI Local Bus Specification, Revision 2.2, for 5.0-V operation
