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12-Bit, 65 MSPS, Dual ADC AD15252
FEATURES
12-bit, 65 MSPS dual ADC Differential input with 100 Ω input impedance Full-scale analog input: 296 mV p-p 170 MHz, 3 dB bandwidth SNR (−9 dBFS): 64 dBFS (70 MHz AIN), 64 dBFS (140 MHz AIN) SFDR (−9 dBFS): 77 dBFS (70 MHz AIN), 73 dBFS (140 MHz AIN) 435 mW per channel Dual parallel output buses Out-of-range indicators Independent clocks Duty cycle stabilizer Twos complement or offset binary data format
OTR_A PDWNA CLKA DATA BUS A
FUNCTIONAL BLOCK DIAGRAM
AD15252
INA LPF OEB_A DFS PDWNB CLKB
INB LPF OEB_B
DATA BUS B
05154-001
APPLICATIONS
Antijam GPS receivers Wireless and wired broadband communications Communications test equipment
OTR_B
Figure 1.
AD15252 Datasheet
