AD4858 Datasheet | Analog Devices

FEATURES - plete 20-bit data acquisition system - Simultaneous sampling of 8 internally buffered channels - 1 MSPS per channel throughput - Differential, wide mon-mode range inputs - ±75 p A typical input leakage at 25°C - Full-scale input step settling time < 300 ns - Integrated reference and reference buffer (4.096 V) - Integrated supply decoupling capacitors - 45 m W per channel at 1 MSPS, power scales with throughput - Minimal external signal conditioning - Seamless high dynamic range - Per sample, per channel automatic gain ranging - Maintains ppm-level INL - Per channel Soft Span input ranges, bipolar or unipolar - ±40 V, ±25 V, ±20 V, ±12.5 V, ±10 V, ±6.25 V, ±5 V, ±2.5 V - 0 V to 40 V, 25 V, 20 V, 12.5 V, 10 V, 6.25 V, 5 V, 2.5 V FUNCTIONAL BLOCK DIAGRAM - Rail-to-rail input overdrive tolerance - High performance - INL: ±160 μV typical (±40 V range) - SNR: 97.2 d B single-conversion typical (±40 V range) - DR: 111.4 d B single-conversion typical (±40 V range) - THD: - 117 d B typical (±40 V range) - CMRR: 120 d B typical - Digital flexibility - SPI CMOS (0.9 V to 5.25 V) and LVDS serial input and output - Optional oversampling with 24-bit digital averaging - Optional offset, gain and phase correction - 7.00 mm × 7.00 mm, 64-ball BGA full solution footprint APPLICATIONS - Automatic test equipment - Avionics and aerospace - Instrumentation and control systems - Semiconductor manufacturing - Test and measurement Figure 1. Functional Block Diagram (Example Analog-Input Signal Use Cases Shown) Rev. 0 DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered...