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AD5679 Datasheet

16-Channel 12-/16-Bit nanoDAC

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Data Sheet
16-Channel, 12-/16-Bit nanoDAC+ with 2 ppm/°C Voltage
Reference Temperature Coefficient, SPI Interface
AD5674/AD5674R/AD5679/AD5679R
FEATURES
High performance
High relative accuracy (INL): ±4 LSB maximum at 16 bits
(AD5679/AD5679R)
TUE: ±0.14% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.06% of FSR maximum
Low drift, 2.5 V voltage reference temperature coefficient:
2 ppm/°C typical
40 mA short-circuit current
Wide operating ranges
−40°C to +125°C temperature range
2.7 V to 5.5 V power supply range
Simplified implementation
User selectable gain of 1 or 2 (GAIN pin)
1.8 V logic compatibility
50 MHz serial peripheral interface (SPI) with readback or
daisy chain
28-lead, 4 mm × 4 mm, RoHS compliant LFCSP
APPLICATIONS
Optical transceivers
Base station power amplifiers
Process control (programmable logic controller (PLC)
input/output cards)
Industrial automation
Data acquisition systems
FUNCTIONAL BLOCK DIAGRAM
VLOGIC
VDD
VREF
AD5679R/AD5679/AD5674R/AD5674
INPUT
REGISTER
DAC
REGISTER
2.5V REF1
STRING
DAC 0
BUFFER
SCLK
SYNC
SDI
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
STRING
DAC 1
STRING
DAC 2
STRING
DAC 3
BUFFER
BUFFER
BUFFER
VOUT0
VOUT1
VOUT2
VOUT3
SDO
LDAC
RESET
POWER-ON
RESET
INPUT
REGISTER
INPUT
REGISTER
DAC
REGISTER
DAC
REGISTER
STRING
DAC 14
BUFFER
VOUT14
STRING
DAC 15
BUFFER
VOUT15
GAIN
×1/×2
POWER-DOWN
LOGIC
1ONLY APPLICABLE TO AD5679R/AD5674R.
Figure 1.
GAIN
GND
GENERAL DESCRIPTION
The AD5674/AD5674R/AD5679/AD5679R are low power,
16-channel, 12-/16-bit, buffered voltage output, digital-to-
analog converters (DACs) that include a 2.5 V, 2 ppm/°C internal
reference (enabled by default), and a gain select pin, resulting
in a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The
devices operate from a single, 2.7 V to 5.5 V supply range and
are guaranteed monotonic by design. The AD5674/AD5674R/
AD5679/AD5679R are available in a 28-lead lead frame chip scale
package (LFCSP) and incorporate a power-on reset (POR) circuit
that ensures that the DAC outputs power up to and remains at
zero-scale or midscale until a valid write. The AD5674/AD5674R/
AD5679/AD5679R contain a power-down mode that reduces
the current consumption to 2 μA typical.
Table 1. Octal and 16-Channel nanoDAC+® Devices
No. of
Channels Interface Reference 16-Bit
12-Bit
8 SPI1 Internal AD5676R AD5672R
External
AD5676 Not
applicable
I2C Internal AD5675R AD5671R
16 SPI Internal AD5679R AD5674R
External AD5679 AD5674
PRODUCT HIGHLIGHTS
1. High channel density: 16 channels in 4 mm × 4 mm
LFCSP.
2. High relative accuracy (integral nonlinearity (INL))
±4 LSB maximum.
3. Low drift, 2.5 V, on-chip reference.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rights of thirdpartiesthatmay result fromits use. Specificationssubject tochangewithout notice.
No license is granted by implication or otherwise under any patent or patent rights of Analog
Devices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2019 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com


Analog Devices Semiconductor Electronic Components Datasheet

AD5679 Datasheet

16-Channel 12-/16-Bit nanoDAC

No Preview Available !

AD5674/AD5674R/AD5679/AD5679R
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AD5674/AD5674R Specifications.............................................. 3
AD5679/AD5679R Specifications.............................................. 5
AC Characteristics........................................................................ 7
Timing Characteristics ................................................................ 7
Daisy-Chain and Readback Timing Characteristics................ 8
Absolute Maximum Ratings.......................................................... 10
Thermal Resistance .................................................................... 10
ESD Caution................................................................................ 10
Pin Configuration and Function Descriptions........................... 11
Typical Performance Characteristics ........................................... 12
Terminology .................................................................................... 21
Theory of Operation ...................................................................... 23
DAC.............................................................................................. 23
Transfer Function ....................................................................... 23
DAC Architecture....................................................................... 23
Serial Interface ............................................................................ 23
Standalone Operation ................................................................ 25
REVISION HISTORY
12/2019—Rev. A to Rev. B
Changes to General Description .................................................... 1
Table 2 and Endnote 1...................................................................... 4
Changes to Table 3............................................................................ 5
Changes to Table 9.......................................................................... 11
Changes to Figure 9........................................................................ 12
Changes to Figure 13 to Figure 18................................................ 13
Changes to Figure 19 to Figure 24................................................ 14
Changes to Figure 25 to Figure 30................................................ 15
Changes to Figure 31 and Figure 32............................................. 16
Changes to Hardware Reset (RESET) Section and Figure 52 and
Figure 53, Moved Table 19............................................................. 19
Added Figure 60 and Changes to Internal Reference Section.. 24
Instantaneous DAC Updating (LDAC Held Low) and Deferred
DAC Updating (LDAC is Pulsed Low) Sections ........................ 28
Hardware Reset (RESET) Section ................................................ 29
Changes to Ordering Guide .......................................................... 32
11/2019—Rev. 0 to Rev. A
Added AD5674, AD5674R, and AD5679................... Throughout
Write and Update Commands.................................................. 25
Daisy-Chain Operation ............................................................. 25
Readback Operation .................................................................. 25
Power-Down Operation ............................................................ 26
Load DAC (Hardware LDAC Pin) ........................................... 27
LDAC Mask Register ................................................................. 27
Hardware Reset (RESET) .......................................................... 28
Power-On Reset Internal Circuit.............................................. 28
Software Reset............................................................................. 28
Internal Reference Setup ........................................................... 28
Solder Heat Reflow..................................................................... 28
Long-Term Temperature Drift ................................................. 29
Thermal Hysteresis .................................................................... 29
Applications Information .............................................................. 30
Power Supply Recommendations............................................. 30
Microprocessor Interfacing....................................................... 30
AD5674/AD5674R/AD5679/AD5679R to ADSP-BF531
Interface ....................................................................................... 30
AD5674/AD5674R/AD5679/AD5679R to SPORT Interface30
Layout Guidelines....................................................................... 30
Galvanically Isolated Interface ................................................. 31
Outline Dimensions ....................................................................... 32
Ordering Guide .......................................................................... 32
Changes to Functional Block Diagram, Table 1, General
Description Section, and Product Highlights Section .................1
Changes to Table 2.............................................................................4
Added AD5679/AD5679R Specifications Section and Table 2;
Renumbered Sequentially ................................................................6
Changes to Thermal Resistance Section ..................................... 11
Changes to Figure 7 to Figure 12.................................................. 12
Changes to Figure 13 to Figure 18 ............................................... 13
Changes to Figure 19 to Figure 24 ............................................... 14
Changes to Figure 25 to Figure 30 ............................................... 15
Changes to Figure 31 to Figure 36 ............................................... 16
Changes to Figure 37 to Figure 42 ............................................... 17
Changes to Figure 60...................................................................... 25
Added Long-Term Temperature Drift Section and Figure 64;
Renumbered Sequentially ............................................................. 28
Changes to Figure 67 and Figure 68 ............................................ 30
Changes to Ordering Guide .......................................................... 32
8/2019—Revision 0: Initial Version
Rev. B | Page 2 of 32


Part Number AD5679
Description 16-Channel 12-/16-Bit nanoDAC
Maker Analog Devices
Total Page 30 Pages
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