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AD5694 - 16-/12-Bit nanoDAC+

General Description

High relative accuracy (INL): ±2 LSB maximum at 16 bits Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rail

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data Sheet AD5696/AD5694 Quad, 16-/12-Bit nanoDAC+ with I2C Interface FEATURES GENERAL DESCRIPTION ► High relative accuracy (INL): ±2 LSB maximum at 16 bits ► Tiny package: 3 mm × 3 mm, 16-lead LFCSP ► Total unadjusted error (TUE): ±0.1% of FSR maximum ► Offset error: ±1.5 mV maximum ► Gain error: ±0.1% of FSR maximum ► High drive capability: 20 mA, 0.5 V from supply rails ► User-selectable gain of 1 or 2 (GAIN pin) ► Reset to zero scale or midscale (RSTSEL pin) ► 1.8 V logic compatibility ► 400 kHz I2C-compatible serial interface ► 4 I2C addresses available ► Low glitch: 0.5 nV-sec ► Low power: 1.8 mW at 3 V ► 2.7 V to 5.