datasheet4u.com

900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf




Analog Devices Semiconductor Electronic Components Datasheet

AD6432 Datasheet

GSM 3 V Transceiver IF Subsystem

No Preview Available !

AD6432 pdf
a
GSM 3 V Transceiver IF Subsystem
AD6432
FEATURES
Fully Compliant with Standard and Enhanced GSM
Specification
DC-350 MHz RF Bandwidths
80 dB Gain Control Range
I/Q Modulation and Demodulation
Onboard Phase Locked Tunable Oscillator
On-Chip Noise Roofing IF Filters
Ultralow Power Design
2.7 V–3.6 V Operating Voltage
User-Selectable Power-Down Modes
Small 44-Lead TQFP Package
Interfaces Directly with AD20msp410 and AD20msp415
GSM Baseband Chipsets
APPLICATIONS
I/Q Modulated Digital Wireless Systems
GSM Mobile Radios
GSM PCMCIA Cards
FUNCTIONAL BLOCK DIAGRAM
BP
PLO
SAW
IF
SYNTH
RF
SYNTH
AD6432
OP AMP
PA
GENERAL DESCRIPTION
The AD6432 IF IC provides the complete transmit and receive
IF signal processing, including I/Q modulation and demodula-
tion, necessary to implement a digital wireless transceiver such
as a GSM handset. The AD6432 may also be used for other
wireless TDMA standards using I/Q modulation.
The AD6432’s receive signal path is based on the proven archi-
tecture of the AD607 and the AD6459. It consists of a mixer,
gain-controlled amplifiers, integrated roofing filter and I/Q
demodulators based on a PLL. The low noise, high-intercept
variable-gain mixer is a doubly-balanced Gilbert-cell type. It has
a nominal –13 dBm input-referred 1 dB compression point and
a 0 dBm input-referred third-order intercept.
The gain-control input accepts an external control voltage input
from an external AGC detector or a DAC. It provides an 80 dB
gain range with 27.5 mV/dB gain scaling, where the mixer and
the IF gains vary together.
The I and Q demodulators provide inphase and quadrature
baseband outputs to interface with Analog Devices’ AD7015
and AD6421 (GSM, DCS1800, PCS1900) baseband convert-
ers. An onboard quadrature VCO, externally phase-locked to
the IF signal, drives the I and Q demodulators. The quadrature
phase-locked oscillator (QPLO) requires no external compo-
nents for frequency control or quadrature generation, and de-
modulates signals at standard GSM system IFs of 13 MHz, or
26 MHz with a reference input frequency of 13 MHz; or, in
general, 1X or 2X the reference frequency. Maximum reference
frequency is 25 MHz.
This reference signal is normally provided by an external
VCTCXO under the control of the radio’s digital signal
processor. The transmit path consists of an I/Q modulator
and buffer amplifier, suitable for carrier frequencies up to
300 MHz and provides an output power of –17.5 dBm in
a 50 system. The quadrature LO signals driving the
I and Q modulator are generated internally by dividing by
two the frequency of the signal presented at the differential
LO port of the AD6432. In both the transmit and receive
paths, onboard filters provide 30 dB of stopband attenuation.
The AD6432 comes in a 44-lead plastic thin quad flatpack
(TQFP) surface mount package.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997


Analog Devices Semiconductor Electronic Components Datasheet

AD6432 Datasheet

GSM 3 V Transceiver IF Subsystem

No Preview Available !

AD6432 pdf
AD6432–SPECIFICATIONS (TA = +25؇C, VP = 3.0 V, GREF = 1.25 V unless otherwise noted)
Parameter
Conditions
Min Typ
Max
Units
RX RF MIXER
RF Input Frequency
AGC Conversion Gain Variation
Input 1 dB Compression Point
Input Third-Order Intercept
SSB Noise Figure
RX IF AMPLIFIER
AGC Gain Variation
Input Resistance
Operating Frequency Range
ZIN = 150 : 0.2 V < VGAIN < 2.4 V
At VGAIN = 2.4 V, ZIN = 150
At VGAIN = 0.2 V, RFIN = –25 dBm
At ZIN = 150 , FRF = 246 MHz,
FLO = 272 MHz, VGAIN = 0.2 V
0.2 V < VGAIN < 2.4 V
at VGAIN = 0.2 V
350
–3 to +15
–13
0
10
–14 to 48
5
10 50
MHz
dB
dBm
dBm
dB
dB
k
MHz
GAIN CONTROL
Total Gain Control Range
Control Voltage Range at GAIN
Gain Scaling
Gain Law Conformance
Bias Current at GREF
Input Resistance at Gain
Mixer+IF+Demod, 0.2 V < VGAIN < 2.4 V
80
0.2
27.5
± 0.1
–0.5
20
2.4
dB
V
mV/dB
dB
µA
k
INTEGRATED IF FILTER
BPF Center Frequency
IFS0 = 1
IFS0 = 0
BPF –3 dB BW
IFS0 = 1
IFS0 = 0
fREF = 13 MHz
“0” = Connect to Ground, “1” = Connect to VP
“0” = Connect to Ground, “1” = Connect to VP
fREF = 13 MHz
“0” = Connect to Ground, “1” = Connect to VP
“0” = Connect to Ground, “1” = Connect to VP
I AND Q DEMODULATOR
Demodulation Gain
Output Voltage Range
Differential
Output Voltage Common-Mode Level Not Power Supply Independent
Output Offset Voltage
Error in Quadrature
Differential, VGAIN = GREF
Differential from I to Q, IF = 13 MHz
Amplitude Match
I/Q Output BW
Output Resistance
CLOAD = 10 pF
Each Pin
0.3
–150
13
26
5
10
17
1.5
1
0.25
3
4.7
MHz
MHz
MHz
MHz
VPOS – 0.2
+150
3.5
dB
V
V
mV
Degrees
dB
MHz
k
QUADRATURE IF PLL
Operating Frequency Range
Reference Frequency Voltage Level
Reference Frequency Range
Acquisition Time
Using 1 k, 1 nF Loop Filter
10
200
80
50
25
MHz
mV p-p
MHz
µs
TRANSMIT MODULATOR
Carrier Output Frequency
Output Power
Input 1 dB Compression Point
I/Q Input Signal Amplitude
I/Q Input Signal Required DC Bias
I/Q Input BW
I/Q Input Resistance
I/Q Phase Balance
I/Q Amplitude Balance
Output Harmonic Content
RLOAD = 150 , Power at Final 50 ,
FIF = 272 MHz
RLOAD = 150 (Differential)
Differential
With LOs 2nd Harmonic 30 dBc
Bellow Fundamental
With LOs 2nd Harmonic 30 dBc
Bellow Fundamental
RLOAD = 150
Carrier Feedthrough
Sideband Suppression
FCARRIER = 272 MHz
I and Q Inputs Driven In Quadrature
300
–17.5
14
2.056
1.2
1
100
± 1.5
± 0.1
–45 (3rd)
–65 (5th)
–33
–37
MHz
dBm
dBm
V p-p
V
MHz
k
Degrees
dB
dBc
dBc
dBc
dBc
–2– REV. 0


Part Number AD6432
Description GSM 3 V Transceiver IF Subsystem
Maker Analog Devices
Total Page 20 Pages
PDF Download
AD6432 pdf
AD6432 Datasheet PDF
[partsNo] view html
View PDF for Mobile








Similar Datasheet

1 AD6432 GSM 3 V Transceiver IF Subsystem Analog Devices
Analog Devices
AD6432 pdf
2 AD6439 Discrete Multitone (DMT) Coprocessor Analog Devices
Analog Devices
AD6439 pdf





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy