AD9207 Overview
Key Features
- Flexible reconfigurable common platform design
- Supports single, dual, and quad band per channel
- Datapaths and DSP blocks are fully bypassable
- On-chip PLL with multichip synchronization
- External RFCLK input option for off-chip PLL
- Support clock input frequencies up to 12 GHz
- Maximum ADC sample rate up to 6 GSPS
- Useable analog bandwidth to 8 GHz
- Maximum data rate up to 6 GSPS using JESD204C
- Noise density: -153 dBFS/Hz
