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Data Sheet AD9207
12-Bit, 6 GSPS, JESD204B/JESD204C Dual ADC
FEATURES
► Flexible reconfigurable common platform design ► Supports single, dual, and quad band per channel ► Datapaths and DSP blocks are fully bypassable ► On-chip PLL with multichip synchronization ► External RFCLK input option for off-chip PLL
► Support clock input frequencies up to 12 GHz ► Maximum ADC sample rate up to 6 GSPS ► Useable analog bandwidth to 8 GHz
► Maximum data rate up to 6 GSPS using JESD204C ► Noise density: −153 dBFS/Hz ► ADC AC performance at 6 GSPS, input at 2.7 GHz, −1 dBFS
► Full-scale sine wave input voltage: 1.475 V p-p ► Noise figure: 25.