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AD9628 - Dual Analog-to-Digital Converter

General Description

3 Specifications 4 DC Specifications 4 AC Specifications 5 Digital Specifications 6 Switching Specifications 8 Timing Specifications 9 Absolute Maximum Ratings 12 Thermal Characteristics 12 ESD Caution 12 Pin Configurations and Function Descriptions 13 Typical Performance Characteristics 19

Key Features

  • 1.8 V analog supply operation 1.8 V CMOS or LVDS outputs SNR = 71.2 dBFS @ 70 MHz SFDR = 93 dBc @ 70 MHz Low power: 101 mW/channel @ 125 MSPS Differential analog input with 650 MHz bandwidth IF sampling frequencies to 200 MHz On-chip voltage reference and sample-and-hold circuit 2 V p-p differential analog input DNL = ±0.25 LSB Serial port control options Offset binary, Gray code, or twos complement data format Optional clock duty cycle stabilizer Integer 1-to-8 input clock divider Data output m.

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Full PDF Text Transcription for AD9628 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for AD9628. For precise diagrams, and layout, please refer to the original PDF.

Data Sheet 12-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9628 FEATURES 1.8 V analog supply operation 1.8 V CMOS or LVDS outputs SNR = 71.2 dBFS @ 70 MHz ...

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supply operation 1.8 V CMOS or LVDS outputs SNR = 71.2 dBFS @ 70 MHz SFDR = 93 dBc @ 70 MHz Low power: 101 mW/channel @ 125 MSPS Differential analog input with 650 MHz bandwidth IF sampling frequencies to 200 MHz On-chip voltage reference and sample-and-hold circuit 2 V p-p differential analog input DNL = ±0.