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12-Bit CCD Signal Processor with Precision Timing Generator
AD9992
FEATURES
1.8 V AFETG core Internal LDO regulator and charge pump circuitry Compatibility with 3 V or 1.8 V systems 24 programmable vertical clock outputs Correlated double sampler (CDS) with −3 dB, 0 dB,
+3 dB, and +6 dB gain 6 dB to 42 dB, 10-bit variable gain amplifier (VGA) 12-bit, 40 MHz ADC Black level clamp with variable level control Complete on-chip timing generator Precision Timing core with 400 ps resolution On-chip 3 V horizontal and RG drivers General-purpose outputs (GPOs) for shutter and
system support On-chip driver for external crystal On-chip sync generator with external sync input 105-lead CSP_BGA package, 8 mm × 8 mm, 0.
AD9992 Datasheet
