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250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH ADATE305
FEATURES
Driver 3-level driver with high-Z mode and built-in clamps Precision trimmed output resistance Low leakage mode (typically <10 nA) Voltage range: up to −2.0 V to +6.0 V 1.6 ns minimum pulse width, 2 V terminated 2.1 ns minimum pulse width, 3 V terminated Comparator Window and differential comparator 500 MHz input equivalent bandwidth Load ±12 mA maximum current capability Per pin PMU Force voltage range: up to −2.0 V to +6.0 V 5 current ranges: 32 mA, 2 mA, 200 μA, 20 μA, 2 μA Levels 14-bit DAC for DCL levels Typically < ±5 mV INL (calibrated) 16-bit DAC for PMU levels Typically < ±1.5 mV INL (calibrated) linearity in FV mode HVOUT output buffer 0 V to 13.