Datasheet4U Logo Datasheet4U.com

ADAU1702 - SigmaDSP 28-56-Bit Audio Processor

Description

The ADAU1702 is a complete single-chip audio system with a 28-/56-bit audio DSP, ADCs, DACs, and microcontroller-like control interfaces.

Features

  • 28-/56-bit, 25 MIPS digital audio processor 2 ADCs: SNR of 100 dB, THD + N of.
  • 83 dB 4 DACs: SNR of 104 dB, THD + N of.
  • 90 dB Complete standalone operation Self-boot from serial EEPROM Auxiliary ADC with 4-input mux for analog control GPIOs for digital controls and outputs Fully programmable with SigmaStudio graphical tool 28-bit × 28-bit multiplier with 56-bit accumulator for full double precision processing Clock oscillator for generating master clock from crystal PLL for gener.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
ADA-4543 Silicon Bipolar Darlington Amplifier Hewlett-Packard
ADA-4543 Silicon Bipolar Darlington Amplifier AVAGO
ADA-4643 Silicon Bipolar Darlington Amplifier Hewlett-Packard
ADA-4643 Silicon Bipolar Darlington Amplifier AVAGO
ADA-4743 Silicon Bipolar Darlington Amplifier Hewlett-Packard

Other Datasheets by Analog Devices

Part Number Description
ADAU1701 SigmaDSP 28/56-Bit Audio Processor
ADAU1761 24-Bit Audio Codec
ADAU1772 Four ADC / Two DAC Low Power Codec
ADAU1777 Low Power Codec
ADAU1781 Low Noise Stereo Codec

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Data Sheet SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs ADAU1702 FEATURES 28-/56-bit, 25 MIPS digital audio processor 2 ADCs: SNR of 100 dB, THD + N of −83 dB 4 DACs: SNR of 104 dB, THD + N of −90 dB Complete standalone operation Self-boot from serial EEPROM Auxiliary ADC with 4-input mux for analog control GPIOs for digital controls and outputs Fully programmable with SigmaStudio graphical tool 28-bit × 28-bit multiplier with 56-bit accumulator for full double precision processing Clock oscillator for generating master clock from crystal PLL for generating a master clock from 64 × fS, 256 × fS, 384 × fS, or 512 × fS clocks Flexible serial data input/output ports with I2S-compatible, left-justified, right-justified, and TDM modes Sampling rates of up to 192 kHz are sup
Published: |