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ADF4118 Datasheet

RF PLL Frequency Synthesizers

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RF PLL Frequency Synthesizers
ADF4116/ADF4117/ADF4118
FEATURES
GENERAL DESCRIPTION
ADF4116: 550 MHz
ADF4117: 1.2 GHz
ADF4118: 3.0 GHz
2.7 V to 5.5 V power supply
Separate VP allows extended tuning voltage in 3 V systems
Y Grade: −40°C to +125°C
Dual-modulus prescaler
ADF4116: 8/9
ADF4117/ADF4118: 32/33
3-wire serial interface
Digital lock detect
Power-down mode
Fastlock mode
The ADF411x family of frequency synthesizers can be used to
implement local oscillators (LO) in the upconversion and
downconversion sections of wireless receivers and transmitters.
They consist of a low noise digital phase frequency detector
(PFD), a precision charge pump, a programmable reference
divider, programmable A and B counters, and a dual-modulus
prescaler (P/P + 1). The A (5-bit) and B (13-bit) counters, in
conjunction with the dual-modulus prescaler (P/P + 1),
implement an N divider (N = BP + A). In addition, the 14-bit
reference counter (R counter) allows selectable REFIN frequencies
at the PFD input. A complete phase-locked loop (PLL) can be
implemented if the synthesizer is used with an external loop
filter and voltage controlled oscillator (VCO).
APPLICATIONS
All of the on-chip registers are controlled via a simple 3-wire
Base stations for wireless radio
(GSM, PCS, DCS, CDMA, WCDMA)
interface. The devices operate with a power supply ranging
from 2.7 V to 5.5 V and can be powered down when not in use.
Wireless handsets
(GSM, PCS, DCS, CDMA, WCDMA)
Wireless LANs
Communications test equipment
CATV equipment
FUNCTIONAL BLOCK DIAGRAM
AVDD
DVDD
VP CPGND
ADF4116/ADF4117/ADF4118
REFERENCE
REFIN
CLK
DATA
LE
RFINA
RFINB
14-BIT
R COUNTER
14
R COUNTER
LATCH
21-BIT
INPUT REGISTER 19
FUNCTION
LATCH
SDOUT
FROM
FUNCTION LATCH
A, B COUNTER
LATCH
13
N = BP + A
13-BIT
B COUNTER
PRESCALER
P/P + 1
LOAD
LOAD
5-BIT
A COUNTER
18
PHASE
FREQUENCY
DETECTOR
LOCK
DETECT
AVDD
SDOUT
5
CE
AGND
DGND
Figure 1.
CHARGE
PUMP
MUX
HIGH Z
M3 M2 M1
FLO
SWITCH
CP
MUXOUT
FLO
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2000–2007 Analog Devices, Inc. All rights reserved.


Analog Devices Semiconductor Electronic Components Datasheet

ADF4118 Datasheet

RF PLL Frequency Synthesizers

No Preview Available !

ADF4116/ADF4117/ADF4118
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 5
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 8
Circuit Description......................................................................... 12
Reference Input Section............................................................. 12
RF Input Stage............................................................................. 12
Prescaler (P/P + 1)...................................................................... 12
A Counter and B Counter ......................................................... 12
R Counter .................................................................................... 12
Phase Frequency Detector (PFD) and Charge Pump............ 13
MUXOUT and Lock Detect...................................................... 13
Input Shift Register..................................................................... 13
REVISION HISTORY
4/07—Rev. C to Rev. D
Changes to REFIN Characteristics Section..................................... 3
Changes to Table 4............................................................................ 7
Changes to Figure 35...................................................................... 22
Changes to Ordering Guide .......................................................... 25
11/05—Rev. B to Rev. C
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 5
Changes to Table 3............................................................................ 6
Changes to Table 4............................................................................ 7
Changed OSC 3B1-13M0 to FOX801BH-130 ............................ 21
Changes to Ordering Guide .......................................................... 25
Latch Summaries ........................................................................ 14
Latch Maps .................................................................................. 15
Function Latch................................................................................ 19
Counter Reset ............................................................................. 19
Power-Down ............................................................................... 19
MUXOUT Control..................................................................... 19
Phase Detector Polarity ............................................................. 19
Charge Pump Three-State......................................................... 19
Fastlock Enable Bit ..................................................................... 19
Fastlock Mode Bit....................................................................... 19
Timer Counter Control ............................................................. 19
Initialization Latch ..................................................................... 20
Device Programming After Initial Power-Up ........................ 20
Applications Information .............................................................. 21
Local Oscillator for the GSM Base Station Transmitter........ 21
Shutdown Circuit ....................................................................... 21
Direct Conversion Modulator .................................................. 21
Interfacing ................................................................................... 24
Outline Dimensions ....................................................................... 25
Ordering Guide .......................................................................... 25
9/04—Rev. A to Rev. B
Changes to Specifications.................................................................3
Changes to Ordering Guide .......................................................... 25
3/01—Rev. 0 to Rev. A
4/00—Rev. 0: Initial Version
Rev. D | Page 2 of 28


Part Number ADF4118
Description RF PLL Frequency Synthesizers
Maker Analog Devices
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ADF4118 Datasheet PDF





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