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ADM8324 - Supervisory Circuits

Download the ADM8324 datasheet PDF. This datasheet also covers the ADM8323 variant, as both devices belong to the same supervisory circuits family and are provided as variant models within a single manufacturer datasheet.

General Description

The ADM8323/ADM8324 are supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems.

An on-chip watchdog timer checks for activity within a preset timeout window.

Key Features

  • Windowed watchdog, 8 timeout options 26 reset threshold options 2.5 V to 5 V in 100 mV increments 4 reset timeout options 1 ms, 20 ms, 140 ms, and 1120 ms (minimum) Manual reset input Open-drain or push-pull RESET outputs Low power consumption Specified over wide temperature range (.
  • 40°C to +125°C) Qualified for automotive.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ADM8323-AnalogDevices.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Analog Devices

Part Number Description
ADM8320 Supervisory Circuits
ADM8321 Supervisory Circuits
ADM8322 Supervisory Circuits
ADM8323 Supervisory Circuits
ADM8316 Supervisory Circuits

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Supervisory Circuits with Windowed Watchdog and Manual Reset in 5-Lead SOT-23 Data Sheet FEATURES Windowed watchdog, 8 timeout options 26 reset threshold options 2.5 V to 5 V in 100 mV increments 4 reset timeout options 1 ms, 20 ms, 140 ms, and 1120 ms (minimum) Manual reset input Open-drain or push-pull RESET outputs Low power consumption Specified over wide temperature range (−40°C to +125°C) Qualified for automotive applications 5-lead SOT-23 package ADM8323 VCC VCC VREF ADM8323/ADM8324 FUNCTIONAL BLOCK DIAGRAMS RESET GENERATOR RESET MR DEBOUNCE WINDOWED WATCHDOG DETECTOR 11802-001 GND WDI Figure 1.