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ADN2811 - OC-48/OC-48 FEC Clock and Data Recovery IC

Key Features

  • Meets SONET Requirements for Jitter Transfer/ Generation/Tolerance Quantizer Sensitivity: 4 mV Typ Adjustable Slice Level: ؎ 100 mV 1.9 GHz Minimum Bandwidth Patented Clock Recovery Architecture Loss of Signal Detect Range: 3 mV to 15 mV www. DataSheet4U. com Single Reference Clock Frequency for Both Native SONET and 15/14 (7%) Wrapper Rate Choice of 19.44 MHz, 38.88 MHz, 77.76 MHz, or 155.52 MHz REFCLK LVPECL/LVDS/LVCMOS/LVTTL Compatible Inputs (LVPECL/LVDS Only at 155.52 MHz) 19.44 MHz Oscillato.

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Datasheet Details

Part number ADN2811
Manufacturer Analog Devices
File Size 389.28 KB
Description OC-48/OC-48 FEC Clock and Data Recovery IC
Datasheet download datasheet ADN2811 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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a OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp ADN2811 PRODUCT DESCRIPTION FEATURES Meets SONET Requirements for Jitter Transfer/ Generation/Tolerance Quantizer Sensitivity: 4 mV Typ Adjustable Slice Level: ؎ 100 mV 1.9 GHz Minimum Bandwidth Patented Clock Recovery Architecture Loss of Signal Detect Range: 3 mV to 15 mV www.DataSheet4U.com Single Reference Clock Frequency for Both Native SONET and 15/14 (7%) Wrapper Rate Choice of 19.44 MHz, 38.88 MHz, 77.76 MHz, or 155.52 MHz REFCLK LVPECL/LVDS/LVCMOS/LVTTL Compatible Inputs (LVPECL/LVDS Only at 155.52 MHz) 19.44 MHz Oscillator On-Chip to Be Used with External Crystal Loss of Lock Indicator Loopback Mode for High Speed Test Data Output Squelch and Bypass Features Single-Supply Operation: 3.