* ±8 kV ESD IEC 61000-4-2 contact discharge on receiver input pins 400 Mbps (200 MHz) switching rates 100 ps channel-to-channel skew (typical) 100 ps differential skew (typical) 3.3 ns propagation delay (maximum) 3.3 V power supply High impedance outputs on power-down Low power design (10 mW quiescent
ADN4666
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Quad cmos differential line receiver.
www.DataSheet4U.com 3 V, LVDS, Quad CMOS Differential Line Receiver ADN4666 FUNCTIONAL BLOCK DIAGRAM ADN4666 RIN1 RIN1+ R1 ROUT1 EN R4 ROUT4.
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