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ADP320 Datasheet High PSRR Voltage Regulator

Manufacturer: Analog Devices

Overview: Data Sheet.

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General Description

The ADP320 200 mA triple output LDO combines high PSRR, low noise, low quiescent current, and low dropout voltage in a voltage regulator ideally suited for wireless applications with demanding performance and board space requirements.

The low quiescent current, low dropout voltage, and wide input voltage range of the ADP320 triple LDO extend the battery life of portable devices.

The ADP320 triple LDO maintains power supply rejection greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage.

Key Features

  • Bias voltage range (VBIAS): 2.5 V to 5.5 V LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V Three 200 mA low dropout voltage regulators 16-lead, 3 mm × 3 mm LFCSP Initial accuracy: ±1% Stable with 1 µF ceramic output capacitors No noise bypass capacitor required 3 independent logic controlled enables Over current and thermal protection Key specifications High PSRR 76 dB PSRR up to 1 kHz 70 dB PSRR 10 kHz 60 dB PSRR at 100 kHz 40 dB PSRR at 1 MHz Low output noise 24 µV rms typical output.

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