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ADP322 Datasheet High PSRR Voltage Regulator

Manufacturer: Analog Devices

Overview: Data Sheet.

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General Description

The ADP322/ADP323 200 mA triple output LDOs combine high PSRR, low noise, low quiescent current, and low dropout voltage to extend the battery life of portable devices and are ideally suited for wireless applications with demanding performance and board space requirements.

The ADP322/ADP323 PSRR is greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage.

The ADP322/ADP323 offer much lower noise performance than competing LDOs without the need for a noise bypass capacitor.

Key Features

  • Fixed (ADP322) and adjustable output (ADP323) options Bias voltage range (VBIAS): 2.5 V to 5.5 V LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V Three 200 mA low dropout voltage regulators (LDOs) 16-lead, 3 mm × 3 mm LFCSP Initial accuracy: ±1% Stable with 1 µF ceramic output capacitors No noise bypass capacitor required 3 independent logic controlled enables Overcurrent and thermal protection Key specifications High PSRR 76 dB PSRR up to 1 kHz 70 dB PSRR at 10 kHz 60 dB PSRR at 100 kH.

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