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ADP7102 - CMOS LDO

General Description

The ADP7102 is a CMOS, low dropout linear regulator that operates from 3.3 V to 20 V and provides up to 300 mA of output current.

This high input voltage LDO is ideal for regulation of high performance analog and mixed signal circuits operating from 19 V to 1.22 V rails.

Key Features

  • Input voltage range: 3.3 V to 20 V Maximum output current: 300 mA Low noise: 15 μV rms for fixed output versions PSRR performance of 60 dB at 10 kHz, VOUT = 3.3 V Reverse current protection Low dropout voltage: 200 mV at 300 mA load Initial accuracy: ±0.8% Accuracy over line, load, and temperature:.
  • 2%, +1% Low quiescent current (VIN = 5 V), IGND = 750 μA with 300 mA load Low shutdown current: 40 μA at VIN = 12 V Stable with small 1 μF ceramic output capacitor 7 fixed output voltage opti.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data Sheet 20 V, 300 mA, Low Noise, CMOS LDO ADP7102 FEATURES Input voltage range: 3.3 V to 20 V Maximum output current: 300 mA Low noise: 15 μV rms for fixed output versions PSRR performance of 60 dB at 10 kHz, VOUT = 3.3 V Reverse current protection Low dropout voltage: 200 mV at 300 mA load Initial accuracy: ±0.8% Accuracy over line, load, and temperature: −2%, +1% Low quiescent current (VIN = 5 V), IGND = 750 μA with 300 mA load Low shutdown current: 40 μA at VIN = 12 V Stable with small 1 μF ceramic output capacitor 7 fixed output voltage options: 1.5 V, 1.8 V, 2.5 V, 3 V, 3.3 V, 5 V, and 9 V Adjustable output from 1.