ADRV9029 Datasheet | Analog Devices

FEATURES 4 differential transmitters 4 differential receivers 2 observation receivers with 2 inputs each Center frequency: 75 MHz to 6000 MHz Fully integrated DPD adaptation engine for power amplifier linearization Crest factor reduction engine Maximum receiver bandwidth: 200 MHz Maximum transmitter large signal bandwidth: 200 MHz Maximum transmitter synthesis bandwidth: 450 MHz Maximum observation receiver bandwidth: 450 MHz Fully integrated independent fractional-N radio frequency synthesizers Fully integrated clock synthesizer Multichip phase synchronization for all local oscillators and baseband clocks Support for TDD and FDD applications 24.33 Gbps JESD204B/JESD204C digital interface APPLICATIONS 3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations GENERAL DESCRIPTION The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a plete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations. The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs. The plete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other...