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ADuC845 - 24-/16-Bit ADCs

Description

11  General Description 15  8052 Instruction Set 18  Timer Operation 18  ALE 18  External Memory Access 18  Complete SFR Map 19  Functional Description 20  8051 Instruction Set 20  Memory Organization 22  Special Function Registers (SFRs) 24  ADC Circuit I

Features

  • High resolution Σ-Δ ADCs 2 independent 24-bit ADCs on the ADuC845 Single 24-bit ADC on the ADuC847 and single 16-bit ADC on the ADuC848 Up to 10 ADC input channels on all devices 24-bit no missing codes 22-bit rms (19.5 bit p-p) effective resolution Offset drift 10 nV/°C, gain drift 0.5 ppm/°C chop enabled Memory 62-kbyte on-chip Flash/EE program memory 4-kbyte on-chip Flash/EE data memory Flash/EE, 100-year retention, 100 kcycle endurance 3 levels of Flash/EE program memory security In-circuit.

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Data Sheet FEATURES High resolution Σ-Δ ADCs 2 independent 24-bit ADCs on the ADuC845 Single 24-bit ADC on the ADuC847 and single 16-bit ADC on the ADuC848 Up to 10 ADC input channels on all devices 24-bit no missing codes 22-bit rms (19.5 bit p-p) effective resolution Offset drift 10 nV/°C, gain drift 0.5 ppm/°C chop enabled Memory 62-kbyte on-chip Flash/EE program memory 4-kbyte on-chip Flash/EE data memory Flash/EE, 100-year retention, 100 kcycle endurance 3 levels of Flash/EE program memory security In-circuit serial download (no external hardware) High speed user download (5 sec) 2304 bytes on-chip data RAM 8051-based core 8051-compatible instruction set High performance single-cycle core 32 kHz external crystal On-chip programmable PLL (12.
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