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Arizona Microtek

AZ100E116 Datasheet Preview

AZ100E116 Datasheet

ECL/PECL Quint Differential Line Receiver

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ARIZONA MICROTEK, INC.
AZ10E116
AZ100E116
ECL/PECL Quint Differential Line Receiver
FEATURES
PACKAGE AVAILABILITY
500ps Maximum Propagation Delay
PACKAGE PART NUMBER MARKING NOTES
Dedicated VCCO Pin for Each Receiver
Operating Range of 4.2V to 5.46V
PLCC 28
AZ10E116FN
AZM10E116
<Date Code>
1,2
75kΩ Internal Input Pulldown Resistors
PLCC 28
Direct Replacement for ON Semiconductor
AZ100E116FN
AZM100E116
<Date Code>
1,2
MC10E116 & MC100E116
1 Add R2 at end of part number for 13 inch (2.5K parts) Tape & Reel.
2 Date code format: “YY” for year followed by “WW” for week.
DESCRIPTION
The AZ10/100E116 is a quint differential line receiver with emitter-follower outputs. The E116 provides a VBB
output for single-ended use or a DC bias reference for AC coupling to the device. For single-ended input
applications, the VBB reference should be connected to one side of the Dn/D¯ n differential input pair. The input
signal is then fed to the other Dn/D¯ n input. The VBB pin should be used only as a bias for the E116 as its sink/source
capability is limited. When used, the VBB pin should be bypassed to ground via a 0.01μF capacitor.
The receiver design features clamp circuitry to cause a defined state if both the inverting and non-inverting
inputs are left open; in this case the Q output goes LOW, while the Q¯ output goes HIGH. This feature makes the
device ideal for twisted pair applications.
If both inverting and non-inverting inputs are at an equal potential of > VCC -2.5V, the receiver does not go
to a defined state. This condition may produce output voltage levels between HIGH and LOW.
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.
1630 S. STAPLEY DR., SUITE 127 MESA, ARIZONA 85204 USA (480) 962-5881 FAX (480) 890-2541
www.azmicrotek.com




Arizona Microtek

AZ100E116 Datasheet Preview

AZ100E116 Datasheet

ECL/PECL Quint Differential Line Receiver

No Preview Available !

AZ10E116
AZ100E116
D3 D4 D4 VCCO Q4 Q4 VCCO
25 24 23 22 21 20 19
D3 26
18
D2 27
17
Q3
Q3
D2 28
V1
EE
VBB 2
D0 3
D0 4
5
Pinout: 28-lead
PLCC (top view)
16
15
14
13
12
6 7 8 9 10 11
VCC
Q2
Q2
VCCO
Q1
D1 D1 VCCO Q0 Q0 VCCO Q1
PIN DESCRIPTION
PIN
D0, D¯¯0 -D4, D¯¯4
Q0, Q¯¯0-Q4, Q¯¯4
VBB
VCC , VCCO
VEE
FUNCTION
Differential Input Pairs
Differential Output Pairs
Reference Voltage Output
Positive Supply
Negative Supply
LOGIC SYMBOL
D0 Q0
D0 Q0
D1 Q1
D1 Q1
D2 Q2
D2 Q2
D3 Q3
D3 Q3
D4
D4
VBB
Q4
Q4
Absolute Maximum Ratings are those values beyond which device life may be impaired.
Symbol
Characteristic
Rating
VCC PECL Power Supply (VEE = 0V)
VI PECL Input Voltage (VEE = 0V)
VEE ECL Power Supply (VCC = 0V)
VI ECL Input Voltage (VCC = 0V)
IOUT
Output Current
--- Continuous
--- Surge
0 to +8.0
0 to +6.0
-8.0 to 0
-6.0 to 0
50
100
TA Operating Temperature Range
TSTG Storage Temperature Range
-40 to +85
-65 to +150
Unit
Vdc
Vdc
Vdc
Vdc
mA
°C
°C
10K ECL DC Characteristics (VEE = -4.94V to -5.46V, VCC = VCCO = GND)
Symbol
Characteristic
-40°C
0°C
Min Typ Max Min Typ Max Min
VOH Output HIGH Voltage1 -1080
VOL Output LOW Voltage1 -1950
-890 -1020
-1650 -1950
-840 -980
-1630 -1950
VIH
Input HIGH Voltage
-1230
-890 -1170
-840 -1130
VIL
Input LOW Voltage
-1950
-1500 -1950
-1480 -1950
VBB
Reference Voltage
-1430
-1300 -1380
-1270 -1350
IIH Input HIGH Current
150 150
IIL
Input LOW Current
0.5
0.5
0.5
IEE Power Supply Current
29 35
29 35
1. Each output is terminated through a 50Ω resistor to VCC – 2V.
25°C
Typ
29
Max
-810
-1630
-810
-1480
-1250
150
35
Min
-910
-1950
-1060
-1950
-1310
0.5
85°C
Typ
29
Max
-720
-1595
-720
-1445
-1190
150
35
Unit
mV
mV
mV
mV
mV
μA
μA
mA
November 2006 * REV - 3
www.azmicrotek.com
2


Part Number AZ100E116
Description ECL/PECL Quint Differential Line Receiver
Maker Arizona Microtek
Total Page 5 Pages
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