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ATC35 - Cell-based ASIC

Description

The Atmel ATC35 (AT56K) process is a proprietary 0.35 micron three-layer-metal CMOS process intended for use with a supply voltage of 3.3V ± 0.3V.

The following table shows the range for which Atmel library cells have been characterized.

Table 1.

Features

  • Comprehensive Library of Standard Logic Cells.
  • ATC35 I/O Cells Designed to Operate with VDD = 3.3V ± 0.3V as Main Target Operating Conditions IO35 Pad Library Provides Interface to 5V Environment Oscillators and Phase Locked Loops for Stable Clock Sources Memory Cells Compiled to the Precise Requirements of the Design Compatible with Atmel’s Extensive Range of Microcontroller, DSP, Standard Interface and.

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Features • Comprehensive Library of Standard Logic Cells • ATC35 I/O Cells Designed to Operate with VDD = 3.3V ± 0.3V as Main Target Operating Conditions IO35 Pad Library Provides Interface to 5V Environment Oscillators and Phase Locked Loops for Stable Clock Sources Memory Cells Compiled to the Precise Requirements of the Design Compatible with Atmel’s Extensive Range of Microcontroller, DSP, Standard Interface and Application Specific Cells • High-Performance Analog Cells can be Developed on Request • • • • Cell-based ASIC ATC35 Summary Description The Atmel ATC35 (AT56K) process is a proprietary 0.35 micron three-layer-metal CMOS process intended for use with a supply voltage of 3.3V ± 0.3V. The following table shows the range for which Atmel library cells have been characterized.
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