Download ATC35 Datasheet PDF
ATC35 page 2
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ATC35 Key Features

  • prehensive Library of Standard Logic Cells
  • ATC35 I/O Cells Designed to Operate with VDD = 3.3V ± 0.3V as Main Target Operating
  • High-Performance Analog Cells can be Developed on Request
  • MIN conditions: TJ = -55°C VDD (cell) = 3.60V Process = fast (industrial best case)
  • TYP conditions: TJ = +25°C VDD (cell) = 3.30V Process = typ (industrial typical case)
  • MAX conditions: TJ = +100°C VDD (cell) = 3.00V Process = slow (industrial worst case) Delays to tristate are defined as
  • Buffers and Gates Multiplexers Flip-flops Scan Flip-flops Latches Adders and Subtractors

ATC35 Description

The Atmel ATC35 (AT56K) process is a proprietary 0.35 micron three-layer-metal CMOS process intended for use with a supply voltage of 3.3V ± 0.3V. The following table shows the range for which Atmel library cells have been characterized. Simulation representations exist for three types of operating conditions.