SLES057 – DECEMBER 2002
12-BIT 30 MSPS DUAL CHANNEL
CCD SIGNAL FRONT END FOR DIGITAL COPIER
D Dual Channel CCD Signal Processing:
– Correlated Double Sampler (CDS)
– Sample Hold Mode
– Digital Programmable Amplifier
– CCD Offset Correction (OB loop)
D High Performance A/D:
– 12-Bit Resolution
– INL: ±2 LSB
– DNL: ±0.5 LSB
– No Missing Codes
D High-Speed Operation
– Sample Rate: 30 MHz (Minimum)
D 78-dB Signal-To-Noise Ratio (at 0-dB Gain)
D Low Power Consumption:
– Low Voltage: 3 V to 3.6 V
– Low Power: 290 mW (Typ) at 3.3 V
– Standby Mode: 20 mW (Typ)
The VSP5000 device is a complete application specific
standard product (ASSP) for charge-coupled device
(CCD) line sensor applications such as copiers, scanners,
and facsimiles. The VSP5000 device provides two
independent channels of processing lines and performs
analog front-end processing and analog-to-digital (A/D)
conversion. Each channel has a correlated double
sampler (CDS)/sample hold (SH) circuit, a 14-bit
analog-to-digital converter (ADC), a digital programmable
gain amplifier (DPGA), and an optical black (OB)
correction loop. Data output is 12 bits in length and the
2-channel A/D data is multiplexed and output.
The VSP5000 is available in a 64-lead LQFP package and
operates from a single 3.3-V supply.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2002, Texas Instruments Incorporated