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CHL8326 Datasheet Preview

CHL8326 Datasheet

DIGITAL MULTI-PHASE GPU BUCK CONTROLLER

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PRODUCT BRIEF PRELIMINARY CHL8326/8
DIGITAL MULTI-PHASE GPU BUCK CONTROLLER
FEATURES
6-phase & 8-phase dual output PWM Controller
Phases are flexibly assigned between Loops 1 & 2
Intel® VR12, AMD® SVI/PVI/G34 & Memory modes
Overclocking & Gaming Mode with Vmax setting
Switching frequency from 200kHz to 1.2MHz per phase
CHiL Efficiency Shaping Features including Variable
Gate Drive, Dynamic Phase Control
Programmable 1-phase or 2-phase for Light Loads and
Active Diode Emulation for Very Light Loads
CHiL Adaptive Transient Algorithm (ATA) on both loops
minimizes output bulk capacitors and system cost
Designed for use with coupled inductors
Auto-Phase Detection with auto-compensation
Per-Loop Fault Protection: OVP, UVP, OCP, OTP, CFP
I2C/SMBus/PMBus system interface for telemetry of
Temperature, Voltage, Current & Power for both loops
Non-Volatile Memory (NVM) for custom configuration
Compatible with CHiL ATL and 3.3V tri-state Drivers
+3.3V supply voltage; 0ºC to 85ºC ambient operation
Pb-Free, RoHS, 7x7 48 pin & 8x8 56 pin QFN packages
temperature sensing with VRHOT signal.
The CHL8326/8 also includes numerous features like
register diagnostics for fast design cycles and platform
differentiation, truly simplifying VRD design and enabling
fastest time-to-market with its “set-and-forget” methodology.
48 47 46 45 44 43 42 41 40 39 38 37
RCSP 1
RCSM 2
VCC 3
CFP1 /
VFIXEN_PSI2
4
VSEN 5
VRTN 6
RRES 7
TSEN 8
V18A 9
VR_READY1 /
PWRGD2
VR_READY_L21
/ PWROK2
10
11
VINSEN 12
CHL8326
48 Pin 7x7 QFN
Top View
49 GND
36 RCSP_L2
35 RCSM_L2
34 VCC
33 VSEN_L2
32 VRTN_L2
31 PWM6
30 PWM5
29 PWM4
28 PWM3
27 PWM2
26 PWM1
25 VAR_GATE
13 14 15 16 17 18 19 20 21 22 23 24
DESCRIPTION
The CHL8326/8 are dual-loop digital multi-phase buck
controllers. The CHL8326 drives up to 6 phases and the
CHL8328 drives up to 8 phases. The CHL8326/8 is fully
Intel® VR12 and AMD® SVI/PVI compliant on both loops
and provides a Vtt tracking function for DDR memory.
NVM storage saves pins and enables a small package size.
The CHL8326/8 includes the CHiL Efficiency Shaping
Technology to deliver exceptional efficiency at minimum
cost across the entire load range. CHiL Variable Gate Drive
optimizes the MOSFET gate drive voltage based on real-
time load current. CHiL Dynamic Phase Control adds/drops
phases based upon load current. The CHL8326/8 can be
configured to enter 1-phase operation and active diode
emulation mode automatically or by command.
CHiL’s unique Adaptive Transient Algorithm (ATA), based
on proprietary non-linear digital PWM algorithms, minimizes
output bulk capacitors. In addition, a coupled inductor mode,
with phases added/dropped in pairs, enables further
improvement in transient response and form factor.
The I2C/PMBus interface can communicate with up to 16
CHL8326/8 based VR loops. Device configuration and fault
parameters are easily defined using the CHiL Intuitive
Power Designer (IPD) GUI and stored in on-chip NVM.
The CHL8326/8 provides extensive OVP, UVP, OCP and
OTP fault protection and includes thermistor based
56 55 54 53 52 51 50 49 48 47 46 45 44 43
ISEN8 1
RCSP 2
RCSM 3
VCC
CFP1 /
VFIXEN_PSI2
VSEN
4
5
6
VRTN 7
RRES 8
TSEN 9
V18A 10
VR_READY1 /
PWRGD2
VR_READY_L21
/ PWROK2
11
12
GPO_B 13
VINSEN 14
CHL8328
56 Pin 8x8 QFN
Top View
57 GND
42 ISEN7
41 RCSP_L2
40 RCSM_L2
39 VCC
38 VSEN_L2
37 VRTN_L2
36 PWM8
35 PWM7
34 PWM6
33 PWM5
32 PWM4
31 PWM3
30 PWM2
29 PWM1
15 16 17 18 19 20 21 22 23 24 25 26 27 28
1Intel/MPoL mode
2AMD mode
Figure 1: CHL8326 & CHL8328 Packages
APPLICATIONS
Intel® VR12 & AMD® SVI & PVI based systems
DDR Memory with Vtt tracking
Overclocked & Gaming platforms
Trademarks and registered trademarks are the property of the respective
owners.
PB0011 Rev. 0.05, June 10, 2010
Page 1 of 2
One Highwood Drive, Tewksbury, MA 01876
Tel: +1(978)-640-0011
www.chilsemi.com
© 2010 CHiL Semiconductor Corp. All rights reserved




CHiL Semiconductor

CHL8326 Datasheet Preview

CHL8326 Datasheet

DIGITAL MULTI-PHASE GPU BUCK CONTROLLER

No Preview Available !

PRODUCT BRIEF
CHL8326/8
DIGITAL MULTI-PHASE BUCK CONTROLLER
TYPICAL APPLICATIONS BLOCK DIAGRAM
Rseries
RTh RCS
Rseries
RCSP
CCS
RCSM
+3.3V
VCC
PWM1
ISEN1
IRTN1
To/From
System
RTh2
+12V Main
RVIN_1
RVIN_2
VSEN
VRTN
RRES
TSEN
PWM 2
ISEN2
IRTN2
CHL8326/8
V18A
VR_RDY_L1
VR_RDY_L2
PWM3
ISEN3
IRTN3
VINSEN
RTh2
To/From
CPU
3.3V
TSEN21
SV_ALERT#
SV_CLK
SV_DIO
VR_HOT#
CFP
GPO_A
GPO_B1
PSI2
PWM4
ISEN4
IRTN4
PWM5
ISEN5
IRTN5
PWM6
ISEN6
IRTN6
PWM71
ISEN71
IRTN71
I2C or
SMBus
SMB_DIO
SMB_CLK
SMB_ALERT
SV_ADDR
PM_ADDR
Rseries
RTh RCS
Rseries
RCSP_L2
CCS
RCSM_L2
PWM81
ISEN81
IRTN81
Notes
1 CHL8328 only
2 MPoL mode only
Only Intel/MPoL Mode pin names
shown
VSEN_L2
VRTN_L2
VAR_GATE
GND
12V
V_VGD
Boot CHL8510
Vcc HiGate
HVCC Switch
LVCC
PWM LoGate
GND
Mode
12V
V_VGD
Boot CHL8510
Vcc HiGate
HVCC Switch
LVCC
PWM LoGate
GND
Mode
12V
V_VGD
Boot CHL8510
Vcc HiGate
HVCC Switch
LVCC
PWM LoGate
GND
Mode
12V
V_VGD
Boot CHL8510
Vcc HiGate
HVCC Switch
LVCC
PWM
GND
LoGate
Mode
Unused
Phases
12V
V_VGD
Boot CHL8510
Vcc HiGate
HVCC Switch
LVCC
PWM LoGate
GND
Mode
12V
Boot CHL8510
Vcc HiGate
HVCC Switch
LVCC
PWM
GND
LoGate
Mode
V_VGD
Optional Variable
Gate Drive Circuit
V_CPU_L1
L
O
A
D
V_CPU_L2
L
O
A
D
ORDERING INFORMATION
CHL832 -     
T: Tape & Reel
Package type
R : QFN
Operating Temperature
C: Commercial
Standard
Rxaxn: gCeonfiguration file
R : QFN
Part
6: CHL8326
8: CHL8328
Package
QFN
QFN
QFN
QFN
Tape & Reel Qty
3000
3000
3000
3000
Part Number
CHL8326-00CRT1
CHL8326-xxCRT2
CHL8328-00CRT1
CHL8328-xxCRT2
Notes
1 For unprogrammed/default parts, use
configuration file 00. Unprogrammed parts will not
start up until programmed in order to insure a safe
power up.
2 -xx indicates a customer specific configuration file.
Page 2 of 2
PB0011
Rev. 0.05, June 10, 2010


Part Number CHL8326
Description DIGITAL MULTI-PHASE GPU BUCK CONTROLLER
Maker CHiL Semiconductor
Total Page 2 Pages
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