SKL32B Datasheet | Chip Integration Technology

Features - Electrostatic discharge (ESD) test under IEC6100-4-2 standard >16ΚV(SKL32B~SKL36B). standard >10ΚV(SKL310B~SKL320B). - Low profile surface mounted application in order to optimize board space. - Low power loss, high efficiency. - High current capability, low forward voltage drop. - Ultra high-speed switching. - Silicon epitaxial planar chip, metal silicon junction. - Suffix "G" indicates Halogen-free part, ex.SKL32BG. - Lead-free parts meet environmental standards of MIL-STD-19500 /228 - Mechanical data - Epoxy:UL94-V0 rated flame retardant - Case : Molded plastic, DO-214AA / SMB - Terminals : Solder plated, solderable per MIL-STD-750, Method 2026 - Polarity : Indicated by cathode band - Weight : 0.003 ounce, 0.091 gram - Outline SMB(DO-214AA) 0.08 7 (2.20 ) 0.07 5 (1.90 ) Marking code 0.15 7 (4.00 ) 0.13 0 (3.30 ) 0.09 8 (2.50 ) 0.08 3 (2.10 ) 0.18 9 (4.80 ) 0.15 7 (4.00 ) 0.012 (0.3 1) MAX. 0.06 3 (1.60 ) 0.02 8 (0.70 ) 0.22 0 (5.60 ) 0.19 7 (5.00 ) 0.008 (0.2 1) MAX. Dimensions in inches and (millimeters) - Maximum ratings and electrical characteristics Rating at 25OC ambient temperature unless otherwise specified. Single phase, half wave, 60Hz, resistive or inductive load. For capacitive load, derate current by 20%. Parameter Forward rectified current Forward surge current Reverse current Diode junction capacitance Thermal resistance Storage temperature Conditions See Fig.1 8.3ms single half sine-wave superimposed on rate load (JEDEC method) VR = VRRM TA = 25OC VR = VRRM TA = 100OC f=1MHz and applied 4V DC reverse voltage Junction to ambient Symbol IO IFSM CJ RθJA...