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COPAL ELECTRONICS
COPAL ELECTRONICS

DP7419 Datasheet Preview

DP7419 Datasheet

Dual Digital Potentiometers

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DP7419 pdf
DP7419
Dual Digital Potentiometers (DP)
with 64 Taps and 2-wire Interface
FEATURES
Two linear-taper digital potentiometers
64 resistor taps per potentiometer
End to end resistance 2.5kŸ, 10kŸ, 50kŸ or
100kŸ
Potentiometer control and memory access via
2-wire Interface (I2C like)
Low wiper resistance, typically 80
Four non-volatile wiper settings for each
potentiometer
Recall of wiper settings at power up
2.5 to 6.0 volt operation
Standby current less than 1µA
1,000,000 nonvolatile WRITE cycles
100 year nonvolatile memory data retention
24-lead SOIC and 24-lead TSSOP
Write protection for data register
DESCRIPTION
The DP7419 is two Digital Potentiometers (DPs)
integrated with control logic and 16 bytes of
NVRAM memory.
A separate 6-bit control register (WCR) independently
controls the wiper tap position for each DP.
Associated with each wiper control register are four 6-
bit non-volatile memory data registers (DR) used for
storing up to four wiper settings. Writing to the wiper
control register or any of the non-volatile data regis-
ters is via a 2-wire serial bus (I2C-like). On power-up,
the contents of the first data register (DR0) for each of
the two potentiometers is automatically loaded into its
respective wiper control registers (WCR).
The Write Protection (¯W¯P¯) pin protects against
inadvertent programming of the data register.
The DP7419 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications.
PIN CONFIGURATION
SOIC (W)
(top view)
VCC 1
24 NC
RL0 2
23 NC
RH0 3
22 NC
RW0 4
21 NC
A2 5
20 A0
¯W¯P¯ 6 CAT 19 NC
SDA 7 5419 18 A3
A1 8
17 SCL
RL1 9
16 NC
RH1 10
15 NC
RW1 11
14 NC
GND 12
13 NC
TSSOP (Y)
(top view)
SDA 1
24 ¯W¯P¯
A1 2
23 A2
RL1 3
22 RW0
RH1 4
21 RH0
RW1 5
20 RL0
GND 6 CAT 19 VCC
NC 7 5419 18 NC
NC 8
17 NC
NC 9
16 NC
NC 10
15 NC
SCL 11
14 A0
A3 12
13 NC
For Ordering Information details, see page 15.
FUNCTIONAL DIAGRAM
RH0 RH1
SCL
SDA
WP
A0
A1
A2
A3
2-WIRE BUS
INTERFACE
WIPER
CONTROL
REGISTERS
RW0
CONTROL
LOGIC
NONVOLATILE
DATA
REGISTERS
RW1
RL0 RL1
© NIDEC COPAL ELECTRONICS CORP.
Characteristics subject to change without notice
1
Doc. No. MD-2115 Rev. H



COPAL ELECTRONICS
COPAL ELECTRONICS

DP7419 Datasheet Preview

DP7419 Datasheet

Dual Digital Potentiometers

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DP7419 pdf
DP7419
PIN DESCRIPTIONS
SCL: Serial Clock
The DP7419 serial clock input pin is used to
clock all data transfers into or out of the device.
SDA: Serial Data
The DP7419 bidirectional serial data pin is used
to transfer data into and out of the device. The
SDA pin is an open drain output and can be wire-
OR'd with the other open drain or open collector
outputs.
A0, A1, A2, A3: Device Address Inputs
These inputs set the device address when
addressing multiple devices. A total of sixteen
devices can be addressed on a single bus. A
match in the slave address must be made with the
address input in order to initiate communication
with the DP7419.
RH, RL: Resistor End Points
The RH and RL pins are equivalent to the terminal
connections on a mechanical potentiometer.
RW: Wiper
The RW pins are equivalent to the wiper terminal of
a mechanical potentiometer.
¯W¯P¯: Write Protect Input
The ¯W¯P¯ pin when tied low prevents non-volatile
writes to the data registers (change of wiper
control register is allowed) and when tied high or
left floating normal read/write operations are
allowed. See page 7, Write Protection for more
details.
Pin
SOIC
1
Pin
TSSOP
19
2 20
3 21
4 22
5 23
6 24
71
82
93
10 4
11 5
12 6
13 7
14 8
15 9
16 10
17 11
18 12
19 13
20 14
21 15
22 16
23 17
24 18
Name
VCC
RL0
RH0
RW0
A2
¯W¯P¯
SDA
A1
RL1
RH1
RW1
GND
NC
NC
NC
NC
SCL
A3
NC
A0
NC
NC
NC
NC
Function
Supply Voltage
Low Reference Terminal for
Potentiometer 0
High Reference Terminal for
Potentiometer 0
Wiper Terminal for
Potentiometer 0
Device Address
Write Protection
Serial Data Input/Output
Device Address
Low Reference Terminal for
Potentiometer 1
High Reference Terminal for
Potentiometer 1
Wiper Terminal for
Potentiometer 1
Ground
No Connect
No Connect
No Connect
No Connect
Bus Serial Clock
Device Address
No Connect
Device Address, LSB
No Connect
No Connect
No Connect
No Connect
DEVICE OPERATION
The DP7419 is two resistor arrays integrated with 2wire serial interface logic, four 6-bit wiper control registers
and sixteen 6-bit, non-volatile memory data registers. Each resistor array contains 63 separate resistive elements
connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL). RH and RL are symmetrical and may be interchanged. The tap positions between and
at the ends of the series resistors are connected to the output wiper terminals (RW) by a CMOS transistor switch.
Only one tap point for each potentiometer is connected to its wiper terminal at a time and is determined by the
value of the wiper control register. Data can be read or written to the wiper control registers or the non-volatile
memory data registers via the 2-wire bus. Additional instructions allow data to be transferred between the wiper
control registers and each respective potentiometer's non-volatile data registers. Also, the device can be
instructed to operate in an "increment/decrement" mode.
Doc. No. MD-2115 Rev. H
2 © NIDEC COPAL ELECTRONICS CORP.
Characteristics subject to change without notice


Part Number DP7419
Description Dual Digital Potentiometers
Maker COPAL ELECTRONICS
Total Page 16 Pages
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