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CP555. For precise diagrams, and layout, please refer to the original PDF.
PROCESS Small Signal Transistor PNP - Saturated Switch Transistor Chip CP555 www.DataSheet4U.com PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emit...
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CESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 76,000 PRINCIPAL DEVICE TYPES CMPT3640 CMPT4209 2N4209 BACKSIDE COLLECTOR EPITAXIAL PLANAR 15 x 10 MILS 8.0 MILS 3.6 x 2.4 MILS 3.6 x 2.4 MILS Al - 20,000Å Au - 15,000Å R4 (22-March 2010) w w w. c e n t r a l s e m i . c o m PROCESS CP555 Typical Electrical Characteristics R4 (22-March 2010) w w w. c e n t r a l s e m i .
CP555 Datasheet
