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Chrontel

CH7011A Datasheet Preview

CH7011A Datasheet

Chrontel CH7011 TV Output Device

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CH7011A
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Chrontel CH7011 TV Output Device
1. FEATURES
2. GENERAL DESCRIPTION
• TV output supporting graphics resolutions up to
1024x768 pixels
• Macrovision7.1.L1 copy protection support
• Programmable digital interface supports RGB and
YCrCb
• True scale rendering engine supports underscan in all
TV output resolutions
• Enhanced text sharpness and adaptive flicker
removal with up to 7 lines of filtering
• Support for all NTSC and PAL formats
• Provides CVBS, S-Video and SCART (RGB) outputs
• TV Programmable power management
• 10-bit video DAC outputs
• Fully programmable through serial port
• Complete Windows and DOS driver support
• Low voltage interface support to graphics device
• Offered in a 64-pin LQFP package
The CH7011 is a display controller device which
accepts a digital graphics input signal, and encodes and
transmits data to a TV output (analog composite, s-
video or RGB). The device accepts data over one 12-bit
wide variable voltage data port which supports five
different data formats including RGB and YCrCb.
The TV-Out processor will perform non-interlace to
interlace conversion with scaling and flicker filters, and
encode the data into any of the NTSC or PAL video
standards. The scaling and flicker filter is adaptive and
programmable to enable superior text display. Eight
graphics resolutions are supported up to 1024 by 768
with full vertical and horizontal underscan capability in
all modes. A high accuracy low jitter phase locked loop
is integrated to create outstanding video quality.
Support is provided for Macrovisionand RGB bypass
mode which enables driving a VGA CRT with the input
data.
LINE
MEMORY
D[11:0]
PIXEL DATA
DIGITAL
INPUT
INTERFACE
RGB-YUV
CONVERTER
TRUE SCALE
SCALING &
DEFLICKERING
ENGINE
YUV-RGB CONVERTER
NTSC/PAL
ENCODER
& FILTERS
Four
10-bit
DAC’s
GPIO[1:0]
SERIAL PORT REGISTER &
CONTROL BLOCK
SYSTEM CLOCK
PLL
TIMING & SYNC
GENERATOR
SPC SPD
RESET*
XCLK/XCLK*
H V XI/FIN XO CSYNC P-OUT BCO
Figure 1: Functional Block Diagram
CVBS (DAC3)
Y/G (DAC1)
C/R (DAC2)
CVBS/B
(DAC0)
ISET
201-0000-037 Rev 2.05, 6/6/2002
1




Chrontel

CH7011A Datasheet Preview

CH7011A Datasheet

Chrontel CH7011 TV Output Device

No Preview Available !

CHRONTEL
3. PIN DESCRIPTIONS
www.DataSheet4U.com
3.1 Package Diagram
CH7011A
DVDD
NC
VREF
H
V
DGND
GPIO[1]
GPIO[0]
NC
AS
DGND
DVDD
RESET*
SPD
SPC
AGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Chrontel
CH7011
48 C / H SYNC
47 BCO
46 P-OUT
45 DVDDV
44 AVDD
43 XO
42 XI / FIN
41 AGND
40 GND
39 CVBS / B
38 C / R
37 Y / G
36 CVBS
35 ISET
34 GND
33 VDD
Figure 2: 64-Pin LQFP
2 201-0000-037 Rev 2.05, 6/6/2002


Part Number CH7011A
Description Chrontel CH7011 TV Output Device
Maker Chrontel
Total Page 30 Pages
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