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CS4412A Datasheet Preview

CS4412A Datasheet

Quad Half-Bridge Digital Amplifier Power Stage

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CS4412A
30 W Quad Half-Bridge Digital Amplifier Power Stage
Features
 Configurable Outputs (10% THD+N)
– 2 x 15 W into 8 Ω, Full-Bridge
– 1 x 30 W into 4 Ω, Parallel Full-Bridge
– 4 x 7 W into 4 Ω, Half-Bridge
– 2 x 7 W into 4 Ω, Half-Bridge + 1 x 15 W
into 8 Ω, Full-Bridge
 Space-Efficient Thermally-Enhanced QFN
– No External Heat Sink Required
 > 100 dB Dynamic Range - System Level
 < 0.1% THD+N @ 1 W - System Level
 Built-In Protection with Error Reporting
– Over-Current
– Thermal Warning and Overload
– Under-Voltage
 +8 V to +18 V High Voltage Supply
 PWM Popguard® for Quiet Startup
 No Bootstrap Required
 Low Quiescent Current
 Low Power Standby Mode
Common Applications
 Integrated Digital Televisions
 Portable Media Player Docking Stations
 Mini/Micro Shelf Systems
 Powered Desktop Speakers
General Description
The CS4412A is a high-efficiency power stage for digital
Class-D amplifiers designed to input PWM signals from
a modulator such as the CS4525. The power stage out-
puts can be configured as four half-bridge channels, two
half-bridge channels and one full-bridge channel, two
full-bridge channels, or one parallel full-bridge channel.
The CS4412A integrates on-chip over-current, under-
voltage, over-temperature protection and error report-
ing as well as a thermal warning indicator. The low
RDS(ON) outputs can source up to 2.5 A peak current,
delivering high efficiency which allows small device
package and lower power supplies.
The CS4412A is available in a 48-pin QFN package in
Commercial grade (-10 to +70° C). The CRD4412A cus-
tomer reference design is also available. Please refer to
“Ordering Information” on page 24 for complete order-
ing information.
In 1
In 2
In 3
In 4
Reset
Hardware
Configuration
2.5 V to 5 V
Mode
Configuration
Control Logic
Non-Overlap
Time Insertion
Non-Overlap
Time Insertion
Non-Overlap
Time Insertion
Gate
Drive
Gate
Drive
Gate
Drive
8 V to 18 V
VP
Amplifier
Out 1
Amplifier
Out 2
Amplifier
Out 3
Current &
Thermal Data
Protection &
Error Reporting
Non-Overlap
Time Insertion
Gate
Drive
Amplifier
Out 4
PGND
Advance Product Information
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
MAY '07
DS786A1




Cirrus Logic

CS4412A Datasheet Preview

CS4412A Datasheet

Quad Half-Bridge Digital Amplifier Power Stage

No Preview Available !

CS4412A
TABLE OF CONTENTS
1. PIN DESCRIPTION ................................................................................................................................. 3
2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 5
RECOMMENDED OPERATING CONDITIONS .................................................................................... 5
ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 5
PWM POWER OUTPUT CHARACTERISTICS ..................................................................................... 6
DC ELECTRICAL CHARACTERISTICS ................................................................................................ 7
DIGITAL INTERFACE SPECIFICATIONS ............................................................................................. 7
DIGITAL I/O PIN CHARACTERISTICS ................................................................................................. 8
3. TYPICAL CONNECTION DIAGRAMS ................................................................................................. 9
4. APPLICATIONS ................................................................................................................................... 13
4.1 Overview ........................................................................................................................................ 13
4.2 Reset and Power-Up ...................................................................................................................... 13
4.2.1 PWM Popguard Transient Control ........................................................................................ 13
4.2.2 Initial Pulse Edge Delay ........................................................................................................ 14
4.2.3 Recommended Power-Up Sequence .................................................................................... 14
4.2.4 Recommended Power-Down Sequence ............................................................................... 14
4.3 Output Mode Configuration ............................................................................................................ 15
4.4 Output Filters ................................................................................................................................. 16
4.4.1 Half-Bridge Output Filter ........................................................................................................ 16
4.4.2 Full-Bridge Output Filter (Stereo or Parallel) ......................................................................... 18
4.5 Device Protection and Error Reporting .......................................................................................... 19
4.5.1 Over-Current Protection ........................................................................................................ 19
4.5.2 Thermal Warning, Thermal Error, and Under-Voltage Error ................................................. 19
5. POWER SUPPLY, GROUNDING, AND PCB LAYOUT ....................................................................... 20
5.1 Power Supply and Grounding ........................................................................................................ 20
5.1.1 Integrated VD Regulator ........................................................................................................ 20
5.2 QFN Thermal Pad .......................................................................................................................... 20
6. PARAMETER DEFINITIONS ................................................................................................................ 21
7. PACKAGE DIMENSIONS .................................................................................................................... 22
8. THERMAL CHARACTERISTICS ......................................................................................................... 23
8.1 Thermal Flag .................................................................................................................................. 23
9. ORDERING INFORMATION ................................................................................................................ 24
10. REVISION HISTORY .......................................................................................................................... 24
LIST OF FIGURES
Figure 1.Stereo Full-Bridge Typical Connection Diagram ........................................................................... 9
Figure 2.2.1 Channel Typical Connection Diagram .................................................................................. 10
Figure 3.4 Channel Half-Bridge Typical Connection Diagram .................................................................. 11
Figure 4.Parallel Full-Bridge Typical Connection Diagram ....................................................................... 12
Figure 5.Output Filter - Half-Bridge ........................................................................................................... 16
Figure 6.Output Filter - Full-Bridge ............................................................................................................ 18
LIST OF TABLES
Table 1. I/O Power Rails ............................................................................................................................. 8
Table 2. Typical Ramp Times for Typical VP Voltages ............................................................................. 13
Table 3. Output Mode Configuration Options ............................................................................................ 15
Table 4. Low-Pass Filter Components - Half-Bridge ................................................................................. 16
Table 5. DC-Blocking Capacitors Values - Half-Bridge ............................................................................. 17
Table 6. Low-Pass Filter Components - Full-Bridge ................................................................................. 18
Table 7. Over-current Error Conditions ..................................................................................................... 19
Table 8. Thermal and Under-Voltage Error Conditions ............................................................................. 19
Table 9. Power Supply Configuration and Settings ................................................................................... 20
2 DS786A1


Part Number CS4412A
Description Quad Half-Bridge Digital Amplifier Power Stage
Maker Cirrus Logic
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CS4412A Datasheet PDF






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