M-986-1R2PL Datasheet | Clare

M-986-2R2 MFC Transceivers Features - Direct A-Law PCM digital input - 2.048 Mb/s clocking - Programmable forward/backward mode - Programmable pelled/direct control - Operates with standard codecs for analog interfacing - Microprocessor read/write interface - Binary or 2-of-6 data formats - Single- or dual-channel versions - 5 volt power Applications - Test equipment - Trunk adapters - Paging terminals - Traffic recorders - PBXs Description The M-986-1R2 and -2R2 MFC Transceivers contain all the logic necessary to transmit and receive CCITT R2F (forward) and R2B (backward) multifrequency signals on one 40-pin integrated circuit (IC). M-9861R2 is a single-channel version; M-986-2R2 provides two channels. R1 single and dual multifrequency transceivers are also available as M-986-1R1 and 2R1. Operating with a 20.48 MHz crystal, the M-986 is capable of providing a direct digital interface to an Alaw-encoded PCM digital input. Each channel can be connected to an analog source using a coder-decoder (codec) as shown in the Block Diagram below. The M-986 can be configured by the customer to operate with the transmitter and receiver either coupled together or independently, allowing it to handle a pelled cycle automatically or via mand from the host processor. For the R2 versions of the M-986, A-law is used for coding/decoding. The M-986 is configured and controlled through an integral coprocessor port. Pin Assignments Ordering Information Part # M-986-1R2P M-986-1R2PL M-986-2R2P M-986-2R2PL Description 40-pin plastic DIP, Single Channel 44-pin PLCC, Single Channel 40-pin plastic DIP, Dual Channel 44-pin PLCC, Dual Channel Block Diagram DS-M976-2R2-R3 .clare. M-986-2R2 Function Description The M-986 can be set up for various operating modes by writing two configuration bytes to the coprocessor port. Configuration Options External/Internal Codec Clock (ECLK): If external codec clocking is selected, an external clocking source provides an 8k Hz...