CY14ME064Q Datasheet | Cypress

Features - 64-Kbit nonvolatile static random access memory (nv SRAM) internally organized as 8K × 8 - STORE to Quantum Trap nonvolatile elements initiated automatically on power-down (Auto Store) or by using SPI instruction (Software STORE) or HSB pin (Hardware STORE) - RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL) - Support automatic STORE on power-down with a small capacitor (except for CY14MX064Q1A) - High reliability - Infinite read, write, and RECALL cycles - 1million STORE cycles to Quantum Trap - Data retention: 20 years at 85 C - High speed serial peripheral interface (SPI) - 40-MHz clock rate SPI write and read with zero cycle delay - Supports SPI mode 0 (0,0) and mode 3 (1,1) - SPI access to special functions - Nonvolatile STORE/RECALL - 8-byte serial number - Manufacturer ID and Product ID - Sleep mode - Write protection - Hardware protection using Write Protect (WP) pin - Software protection using Write Disable instruction - Software block protection for 1/4, 1/2, or entire array - Low power consumption - Average active current of 3 m A at 40 MHz operation - Average standby mode current of 150 A - Sleep mode current of 8 A - Industry standard configurations - Operating voltages: - CY14MB064Q: VCC = 2.7 V to 3.6 V - CY14ME064Q: VCC = 4.5 V to 5.5 V - Industrial temperature - 8- and 16-pin small outline integrated circuit (SOIC) package - Restriction of hazardous substances (Ro HS) pliant Functional Description The Cypress CY14MX064Q bines a 64 Kbit nv SRAM with a nonvolatile element in each memory cell with serial SPI interface. The memory is organized as 8K words of 8 bits each. The embedded nonvolatile elements incorporate the Quantum Trap technology, creating the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the Quantum Trap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation)...