CY14ME256J Datasheet | Cypress

Features - 256-Kbit nonvolatile static random access memory (nv SRAM) - Internally organized as 32 K × 8 - STORE to Quantum Trap nonvolatile elements initiated automatically on power-down (Auto Store) or by using I2C mand (Software STORE) or HSB pin (Hardware STORE) - RECALL RECALL) to or SRAM initiated on power-up (Power-Up by I2C mand (Software RECALL) - Automatic STORE on power-down with a small capacitor (except for CY14MX256J1) - High reliability - Infinite read, write, and RECALL cycles - 1 million STORE cycles to Quantum Trap - Data retention: 20 years at 85 C - High speed I2C interface[1] - Industry standard 100 k Hz and 400 k Hz speed - Fast-mode Plus: 1 MHz speed - High speed: 3.4 MHz - Zero cycle delay reads and writes - Write protection - Hardware protection using Write Protect (WP) pin - Software block protection for one quarter, half, or entire array - I2C access to special functions - Nonvolatile STORE/RECALL - 8 byte serial number - Manufacturer ID and Product ID - Sleep mode - Low power consumption - Average active current of 1 m A at 3.4-MHz operation - Average standby mode current of 150 µA - Sleep mode current of 8 µA - Industry standard configurations - Operating voltages: - CY14MC256J: VCC = 2.4 V to 2.6 V - CY14MB256J: VCC = 2.7 V to 3.6 V - CY14ME256J: VCC = 4.5 V to 5.5 V - Industrial temperature - 8- and 16-pin small outline integrated circuit (SOIC) package - Restriction of hazardous substances (Ro HS) pliant Overview The Cypress CY14MC256J/CY14MB256J/CY14ME256J bines a 256-Kbit nv SRAM[2] with a nonvolatile element in each memory cell. The memory is organized as 32 K words of 8 bits each. The embedded nonvolatile elements incorporate the Quantum Trap technology, creating the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the Quantum Trap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place...