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Cypress Semiconductor Electronic Components Datasheet

CY2304 Datasheet

3.3V Zero Delay Buffer

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CY2304
3.3 V Zero Delay Buffer
3.3 V Zero Delay Buffer
Features
Zero input-output propagation delay, adjustable by capacitive
load on FBK input
Multiple configurations
Multiple low-skew outputs
10 MHz to 133 MHz operating range
90 ps typical peak cycle-to-cycle jitter at 15 pF, 66 MHz
Space-saving 8-pin 150-mil small outline integrated circuit
(SOIC) package
3.3 V operation
Industrial temperature available
Functional Description
The CY2304 is a 3.3 V zero delay buffer designed to distribute
high-speed clocks in PC, workstation, datacom, telecom, and
other high performance applications.
The part has an on-chip phase-locked loop (PLL) that locks to an
input clock presented on the REF pin. The PLL feedback is
required to be driven into the FBK pin, and can be obtained from
one of the outputs. The input-to-output skew is guaranteed to be
less than 250 ps, and output-to-output skew is guaranteed to be
less than 200 ps.
The CY2304 has two banks of two outputs each.
The CY2304 PLL enters a power down state when there are no
rising edges on the REF input. In this mode, all outputs are
three-stated and the PLL is turned off, resulting in less than
25 A of current draw.
Multiple CY2304 devices can accept the same input clock and
distribute it in a system. In this case, the skew between the
outputs of two devices is guaranteed to be less than 500 ps.
The CY2304 is available in two different configurations, as
shown in Available Configurations. The CY2304-1 is the base
part, where the output frequencies equal the reference if there is
no counter in the feedback path.
The CY2304-2 allows the user to obtain Ref and 1/2x or 2x
frequencies on each output bank. The exact configuration and
output frequencies depends on which output drives the feedback
pin.
For a complete list of related documentation, click here.
Logic Block Diagram
REF
FBK
CLKA1
PLL
CLKA2
/2 Extra Divider (-2)
CLKB1
CLKB2
Available Configurations
Device
CY2304-1
CY2304-2
CY2304-2
FBK from
Bank A or B
Bank A
Bank B
Bank A Frequency
Reference
Reference
2 × Reference
Bank B Frequency
Reference
Reference/2
Reference
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-07247 Rev. *O
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 17, 2017


Cypress Semiconductor Electronic Components Datasheet

CY2304 Datasheet

3.3V Zero Delay Buffer

No Preview Available !

CY2304
Contents
Pin Configurations ........................................................... 3
Pin Definitions .................................................................. 3
Zero Delay and Skew Control .......................................... 4
Maximum Ratings ............................................................. 5
Operating Conditions ....................................................... 5
Electrical Characteristics ................................................. 5
Switching Characteristics ................................................ 6
Operating Conditions ....................................................... 7
Electrical Characteristics ................................................. 7
Thermal Resistance .......................................................... 8
Test Circuit ........................................................................ 8
Switching Characteristics ................................................ 9
Switching Waveforms .................................................... 10
Ordering Information ...................................................... 11
Ordering Code Definitions ......................................... 11
Package Diagram ............................................................ 12
Acronyms ........................................................................ 13
Document Conventions ................................................. 13
Units of Measure ....................................................... 13
Appendix: Silicon Errata for
the Zero Delay Clock Buffers, CY2304 ......................... 14
Part Numbers Affected .............................................. 14
CY2304 Errata Summary .......................................... 14
CY2303 Qualification Status of fixed silicon .............. 14
Document History Page ................................................. 16
Sales, Solutions, and Legal Information ...................... 17
Worldwide Sales and Design Support ....................... 17
Products .................................................................... 17
PSoC® Solutions ...................................................... 17
Cypress Developer Community ................................. 17
Technical Support ..................................................... 17
Document Number: 38-07247 Rev. *O
Page 2 of 17


Part Number CY2304
Description 3.3V Zero Delay Buffer
Maker Cypress
Total Page 17 Pages
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