CY2308 buffer equivalent, 3.3v zero delay buffer.
* Zero input-output propagation delay, adjustable by capacitive load on FBK input
* Multiple configurations, see Available CY2308 Configurations on page 4 for mor.
The part has an on-chip PLL that locks to an input clock presented on the REF pin. The PLL feedback is driven from exte.
The CY2308 is a 3.3 V Zero Delay Buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications. The part has an on-chip PLL that locks to an input clock presented on the REF pin. The PLL.
Image gallery
Download