* Interface
* HyperBus Interface
* 1.8 V / 3.0 V interface support
* Single-ended clock (CK) - 11 bus signals
* Optional differential clock (CK, CK#) - 12 bus signals
* Chip Select (CS#)
* 8-bit data bus (DQ[7:0])
* Hardware reset (RESET#)
* Bidirectional Read-Write Dat
S27KL0642
Cypress
1.17 MB
Hyperram self-refresh dram.
S27KL0642/S27KS0642 3.0 V/1.8 V, 64 Mb (8 MB), HyperRAM Self-Refresh DRAM S27KL0642/S27KS0642, 3.0 V/1.8 V, 64 Mb (8 MB), HyperRAM Self-Refresh DRAM .
📁 Related Datasheet
S27KL0641 Self-Refresh DRAM (Cypress Semiconductor)
S27KL0642 64Mb self-refresh DRAM (Infineon)
S27KS0641 Self-Refresh DRAM (Cypress Semiconductor)
S27KS0642 HyperRAM Self-Refresh DRAM (Cypress)
S27KS0642 64Mb self-refresh DRAM (Infineon)
S2710 Thyristors (RCA)
S2710B Thyristors (RCA)
S2710D Thyristors (RCA)
S2710M Thyristors (RCA)
S2-24VDC Relay PCB Dpno & DPNC (SDS)
