CY14B101K Datasheet | Cypress

Features - Data integrity of Cypress nv SRAM bined with full featured Real-Time Clock (RTC) - Watchdog timer - Clock alarm with programmable interrupts - Capacitor or battery backup for RTC - 25 ns, 35 ns, and 45 ns access times .. - “Hands-off” automatic STORE on power down with only a small capacitor - STORE to Quantum Trap™ initiated by software, device pin, or on power down - RECALL to SRAM initiated by software or on power up - Infinite READ, WRITE, and RECALL cycles - High reliability - Endurance to 200,000 cycles - - - - - Data retention: 20 years @55°C 10 m A typical ICC at 200 ns cycle time Single 3V operation +20%, - 10% mercial and industrial temperature SSOP package (ROHS pliant) Functional Description The Cypress CY14B101K bines a 1 Mbit nonvolatile static RAM with a full featured real-time clock in a monolithic integrated circuit. The embedded nonvolatile elements incorporate Quantum Trap technology producing the world’s most reliable nonvolatile memory. The SRAM can be read and written an infinite number of times, while independent, nonvolatile data resides in the nonvolatile elements. The Real-Time Clock function provides an accurate clock with leap year tracking and a programmable, high accuracy oscillator. The alarm function is programmable for one time alarm or periodic seconds, minutes, hours, or days. There is also a programmable watchdog timer for process control. Logic Block Diagram Quantum Trap 1024 x 1024 A5 A6 A7 A8 A9 A 12 A 13 A 14 A 15 A 16 V CC V CAP V RTCbat V RTCcap STORE POWER CONTROL STORE/ RECALL CONTROL ROW DECODER STATIC RAM ARRAY 1024 X 1024 RECALL SOFTWARE DETECT COLUMN IO A15 - A0 DQ 0 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 INPUT BUFFERS DQ 1 COLUMN DEC RTC A 0 A 1 A 2 A 3 A 4 A 10 A 11 x1...