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CY14B101NA - 1-Mbit nvSRAM

Download the CY14B101NA datasheet PDF. This datasheet also covers the CY14B101LA variant, as both devices belong to the same 1-mbit nvsram family and are provided as variant models within a single manufacturer datasheet.

Description

The Cypress CY14B101LA

Features

  • 20 ns, 25 ns, and 45 ns access times.
  • Internally organized as 128 K × 8 (CY14B101LA) or 64 K × 16 (CY14B101NA).
  • Hands off automatic STORE on power-down with only a small capacitor.
  • STORE to QuantumTrap nonvolatile elements initiated by software, device pin, or AutoStore on power-down.
  • RECALL to SRAM initiated by software or power-up.
  • Infinite read, write, and RECALL cycles.
  • 1 million STORE cycles to QuantumTrap.
  • 20 year data retention.
  • Single 3 V +20.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY14B101LA-CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CY14B101LA CY14B101NA 1-Mbit (128 K × 8/64 K × 16) nvSRAM 1-Mbit (128 K × 8/64 K × 16) nvSRAM Features ■ 20 ns, 25 ns, and 45 ns access times ■ Internally organized as 128 K × 8 (CY14B101LA) or 64 K × 16 (CY14B101NA) ■ Hands off automatic STORE on power-down with only a small capacitor ■ STORE to QuantumTrap nonvolatile elements initiated by software, device pin, or AutoStore on power-down ■ RECALL to SRAM initiated by software or power-up ■ Infinite read, write, and RECALL cycles ■ 1 million STORE cycles to QuantumTrap ■ 20 year data retention ■ Single 3 V +20% to –10% operation ■ Industrial temperature Logic Block Diagram [1, 2, 3] ■ Packages ❐ 32-pin small-outline integrated circuit (SOIC) ❐ 44-/54-pin thin small outline package (TSOP) Type II ❐ 48-pin shrink small-outline package (SS
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