CY14B101NA Datasheet | Cypress

CY14B101LA CY14B101NA 1-Mbit (128 K × 8/64 K × 16) nv SRAM 1-Mbit (128 K × 8/64 K × 16) nv SRAM Features - 20 ns, 25 ns, and 45 ns access times - Internally organized as 128 K × 8 (CY14B101LA) or 64 K × 16 (CY14B101NA) - Hands off automatic STORE on power-down with only a small capacitor - STORE to Quantum Trap nonvolatile elements initiated by software, device pin, or Auto Store on power-down - RECALL to SRAM initiated by software or power-up - Infinite read, write, and RECALL cycles - 1 million STORE cycles to Quantum Trap - 20 year data retention - Single 3 V +20% to - 10% operation - Industrial temperature Logic Block Diagram [1, 2, 3] - Packages - 32-pin small-outline integrated circuit (SOIC) - 44-/54-pin thin small outline package (TSOP) Type II - 48-pin shrink small-outline package (SSOP) - 48-ball fine-pitch ball grid array (FBGA) - Pb-free and restriction of hazardous substances (Ro HS) pliant Functional Description The Cypress...