CY14B256P Datasheet | Cypress

atures - - - Low power consumption - Single 3 V +20%, - 10% operation - Average active current of 10 m A at 40 MHz operation Industry standard configurations - Industrial temperature - 16-pin small outline integrated circuit (SOIC) package - Restriction of hazardous substances (Ro HS) pliant - - High reliability - - - Infinite read, write, and RECALL cycles 1 million STORE cycles to Quantum Trap Data retention: 20 years Overview The Cypress CY14B256P bines a 256-Kbit nv SRAM[1] with a full-featured real time clock in a monolithic integrated circuit with serial SPI interface. The memory is organized as 32 K words of 8 bits each. The embedded nonvolatile elements incorporate the Quantum Trap technology, creating the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the Quantum Trap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). The STORE and RECALL operations can also be initiated by the user through SPI instruction. - Real time clock (RTC) - Full-featured RTC - Watchdog timer - Clock alarm with programmable interrupts - Capacitor or battery backup for RTC - Backup current of 0.35 µA (typical) High-speed serial peripheral interface (SPI) - 40-MHz clock rate - SRAM memory access - 25-MHz clock rate - RTC memory access - Supports SPI mode 0 (0,0) and mode 3 (1,1) - Logic Block Diagram VCC VCAP CS WP SCK HOLD Instruction decode Write protect Control...