CY14B512P Datasheet PDF (512-Kbit (64 K X 8) Serial (SPI) nvSRAM)

CY14B512P - 512-Kbit (64 K X 8) Serial (SPI) nvSRAM

Description

8 Status Register 9 Read Status Register (RDSR) Instruction 9 Write Status Register (WRSR) Instruction 9 Write Protection and Block Protection 10 Write Enable (WREN) Instruction 10 Write Disable (WRDI) Instruction 10 Block Protection 10 Hardware Write Protection (WP Pin) 11 Memory Access 11 Re

Features

512-Kbit nonvolatile static random access memory (nvSRAM).
Internally organized as 64 K × 8.
STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by the user using HSB pin (Hardware STORE) or SPI instruction (Software STORE).
RECALL to SRAM initiated on power-up (Power-Up RECALL) or by serial peripheral interface (SPI) instruction (Software RECALL).
Automatic STORE on power-down with a small capacitor High reliability.

Datasheet Details

Part number	CY14B512P
Manufacturer	Cypress
File Size	1.55 MB
Description	512-Kbit (64 K X 8) Serial (SPI) nvSRAM
Datasheet	CY14B512P Datasheet
Additional preview pages of the CY14B512P datasheet.

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Full PDF Text Transcription

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512-Kbit (64 K × 8) Serial (SPI) nvSRAM with Real Time Clock 512-Kbit (64 K × 8) Serial (SPI) nvSRAM with Real Time Clock Features ■ ■ 512-Kbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 64 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by the user using HSB pin (Hardware STORE) or SPI instruction (Software STORE) ❐ RECALL to SRAM initiated on power-up (Power-Up RECALL) or by serial peripheral interface (SPI) instruction (Software RECALL) ❐ Automatic STORE on power-down with a small capacitor High reliability ❐ ❐ ❐ Write protection ❐ Hardware protection using Write Protect (WP) pin ❐ Software protection using Write Disable instruction ❐ Software block protection for 1/4, 1/2, or entire array Low pow

Published: Mar 30, 2011 |