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Cypress Semiconductor Electronic Components Datasheet

CY14V104NA Datasheet

4-Mbit (512 K x 8 / 256 K x 16) nvSRAM

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CY14V104LA
CY14V104NA
4-Mbit (512 K × 8 / 256 K × 16) nvSRAM
4-Mbit (512 K × 8 / 256 K × 16) nvSRAM
Features
Functional Description
25 ns and 45 ns access times
Internally organized as 512 K × 8 (CY14V104LA) or 256 K × 16
(CY14V104NA)
Hands off automatic STORE on power-down with only a small
capacitor
STORE to QuantumTrap non-volatile elements initiated by
software, device pin, or AutoStore on power-down
RECALL to SRAM initiated by software or power-up
Infinite read, write, and recall cycles
1-million STORE cycles to QuantumTrap
20 year data retention
The Cypress CY14V104LA/CY14V104NA is a fast static RAM,
with a non-volatile element in each memory cell. The memory is
organized as 512 K bytes of 8 bits each or 256 K words of 16 bits
each. The embedded non-volatile elements incorporate
QuantumTrap technology, producing the world’s most reliable
non-volatile memory. The SRAM provides infinite read and write
cycles, while independent non-volatile data resides in the highly
reliable QuantumTrap cell. Data transfers from the SRAM to the
non-volatile elements (the STORE operation) takes place
automatically at power-down. On power-up, data is restored to
the SRAM (the RECALL operation) from the non-volatile
memory. Both the STORE and RECALL operations are also
available under software control.
For a complete list of related documentation, click here.
Core VCC = 3.0 V to 3.6 V; IO VCCQ = 1.65 V to 1.95 V
Industrial temperature
48-ball fine-pitch ball grid array (FBGA) package
Pb-free and restriction of hazardous substances (RoHS)
compliance
Logic Block Diagram [1, 2, 3]
Quatrum Trap
VCC VCCQ VCAP
2048 X 2048
A0 R
POWER
A1 O
STORE
CONTROL
A2
A3
A4
A5
W
RECALL
D
E STATIC RAM
STORE/RECALL
CONTROL
HSB
A6 C ARRAY
A7
A8
A17
O 2048 X 2048
D
E
SOFTWARE
DETECT
A14 - A2
A18 R
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
I
N
P
U
T
B COLUMN I/O
U
F
F
E
R COLUMN DEC
S
A9 A10 A11 A12 A13 A14 A15 A16
OE
WE
CE
BLE
BHE
Notes
1. Address A0–A18 for × 8 configuration and Address A0–A17 for × 16 configuration.
2. Data DQ0–DQ7 for × 8 configuration and Data DQ0–DQ15 for × 16 configuration.
3. BHE and BLE are applicable for × 16 configuration only.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-53954 Rev. *H
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 5, 2014


Cypress Semiconductor Electronic Components Datasheet

CY14V104NA Datasheet

4-Mbit (512 K x 8 / 256 K x 16) nvSRAM

No Preview Available !

CY14V104LA
CY14V104NA
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 3
Device Operation .............................................................. 4
SRAM Read ................................................................ 4
SRAM Write ................................................................. 4
AutoStore Operation .................................................... 4
Hardware STORE Operation ....................................... 4
Hardware RECALL (Power-Up) .................................. 5
Software STORE ......................................................... 5
Software RECALL ....................................................... 5
Preventing AutoStore .................................................. 6
Data Protection ............................................................ 6
Maximum Ratings ............................................................. 7
Operating Range ............................................................... 7
DC Electrical Characteristics .......................................... 7
Data Retention and Endurance ....................................... 8
Capacitance ...................................................................... 8
Thermal Resistance .......................................................... 8
AC Test Loads .................................................................. 9
AC Test Conditions .......................................................... 9
AC Switching Characteristics ....................................... 10
Switching Waveforms .................................................... 11
AutoStore/Power-Up RECALL ....................................... 14
Switching Waveforms .................................................... 14
Software Controlled STORE/RECALL Cycle ................ 15
Switching Waveforms .................................................... 15
Hardware STORE Cycle ................................................. 16
Switching Waveforms .................................................... 16
Truth Table For SRAM Operations ................................ 17
Ordering Information ...................................................... 18
Ordering Code Definitions ......................................... 18
Package Diagrams .......................................................... 19
Acronyms ........................................................................ 20
Document Conventions ................................................. 20
Units of Measure ....................................................... 20
Document History Page ................................................. 21
Sales, Solutions, and Legal Information ...................... 23
Worldwide Sales and Design Support ....................... 23
Products .................................................................... 23
PSoC® Solutions ...................................................... 23
Cypress Developer Community ................................. 23
Technical Support ..................................................... 23
Document Number: 001-53954 Rev. *H
Page 2 of 23


Part Number CY14V104NA
Description 4-Mbit (512 K x 8 / 256 K x 16) nvSRAM
Maker Cypress Semiconductor
Total Page 23 Pages
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