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Cypress Semiconductor Electronic Components Datasheet

CY26049-22 Datasheet

Global Communications Clock Generator

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CY26049-22
FailSafe™ PacketClock™
Global Communications Clock Generator
Features
Benefits
• Fully integrated phase-locked loop (PLL)
• FailSafeoutput
• PLL driven by a crystal oscillator that is phase aligned
with external reference
• 100-MHz output from 10-MHz input
• Low-jitter, high-accuracy outputs
• 3.3V ± 5% operation
• 16-lead TSSOP
• Integrated high-performance PLL tailored for telecommuni-
cations frequency synthesis eliminates the need for external
loop filter components
• When reference is off, DCXO maintains clock outputs and
SAFE pin indicates FailSafe conditions
• DCXO maintains continuous operation should the input
reference clock fail
• Glitch-free transition simplifies system design
• Works with commonly available, low-cost 10-MHz crystal
• Zero-ppm error for all output frequencies
• Compatible across industry standard design platforms
• Industry standard package with 6.4 × 5.0 mm2 footprint and
a height profile of just 1.1 mm
Logic Block Diagram
input reference
(10M Hz)
IC L K
external pullable crystal
(10M Hz)
XIN XOUT
F A ILS A F ETM
CONTROL
D IG IT A L
CONTROLLED
CRYSTAL
O SCILLATOR
PHASE
LOCKED
LOOP
OUTPUT
D IV ID E R
CLKA
100M H z
SAFE
ICLK detected
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Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07730 Rev. **
Revised January 12, 2005


Cypress Semiconductor Electronic Components Datasheet

CY26049-22 Datasheet

Global Communications Clock Generator

No Preview Available !

Pin Configuration
CY26049-22
16-pin TSSOP
Top View
ICLK 1
NC 2
NC 3
NC 4
16 NC
15 CLKA
14 NC
13 NC
VDD 5
VSS 6
12 VDD
11 VSS
NC 7
10 SAFE
XIN 8
9 XOUT
Pin Description
Pin Number Pin Name
Pin Description
1 ICLK Reference Input Clock; 10 MHz.
2 NC No Connect.
3 NC No Connect.
4 NC No Connect.
5 VDD Voltage Supply; 3.3V.
6 VSS Ground.
7 NC No Connect
8 XIN Pullable Crystal Input; 10 MHz.
9 XOUT Pullable Crystal Output; 10 MHz.
10 SAFE High = reference ICLK within range, Low = reference ICLK out of range.
11 VSS Ground.
12 VDD Voltage Supply; 3.3V.
13 NC No Connect.
14 NC No Connect.
15 CLKA Clock Output. 100 MHz
16 NC No Connect.
Selector Guide
Part Number
CY26049ZXC-22
Input Frequency Range
Reference Input Clock: 10 MHz
Crystal: 10-MHz pullable Crystal per Cypress Specification
Outputs
1
Output Frequencies
100 MHz
Description
CY26049-22 is a FailSafefrequency synthesizer with a
reference clock input and 100-MHz output. The device
www.DparotavSidheeset4Uan.comoptimum solution for applications where
continuous operation is required in the event of a primary clock
failure. The continuous, glitch-free operation is achieved by
using a DCXO, which serves as a primary clock source. The
FailSafe control circuit synchronizes the DCXO oscillator with
the reference as long as the reference is within the pull range
of the crystal.
In the event of a reference clock failure the DCXO maintains
the last frequency of the reference clock. The unique feature
of the CY26049-22 is that the DCXO is, in fact, the primary
clocking source. When the reference clock is restored, the
DCXO automatically resynchronizes to the reference. The
status of the reference clock input, as detected by the
CY26049-22, is reported by the SAFE pin.
Document #: 38-07730 Rev. **
Page 2 of 6


Part Number CY26049-22
Description Global Communications Clock Generator
Maker Cypress Semiconductor
Total Page 6 Pages
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