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Cypress Semiconductor Electronic Components Datasheet

CY28439 Datasheet

Clock Generator

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CY28439
Clock Generator for IntelGrantsdale Chipset
Features
• Compliant to IntelCK410
• Supports Intel Prescott and Tejas CPU
• Selectable CPU frequencies
• Differential CPU clock pairs
• 100-MHz differential SRC clocks (two selectable
between Fixed and Overclocking)
• 96-MHz differential dot clock
• 48-MHz USB clocks
• 33-MHz PCI clock
• Dial-A-Frequency
Block Diagram
Xin
Xout
FS_[E:A]
14.318MHz
Crystal
PLL Reference
PLL1
CPU
Divider
VTTPWR_GD#/PD
PLL2
SRC
Divider
PLL3
SATA
Divider
PLL4
Fixed
Divider
SDATA
SCLK
I2C
Logic
Watchdog
Timer
VDD_RE
F
RE
F
IREF
VDD_CPU
CPUT
CPUC
VDD_SRC
SRCT (PCI Ex)
SRCC (PCI Ex)
VDD_SRC
SRCT4_SATA
SRCC4_SATA
VDD_48Mhz
DOT96T
DOT96C
VDD_48
USB48
VDD_48
24/48
VDD_PCI
PCI
VDD_PCI
PCIF
SRESET#
• Watchdog
• Two independent overclocking PLLs
• Low-voltage frequency select input
• I2C support with readback capabilities
• Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
• 3.3V power supply
56-pin SSOP and TSSOP packages
CPU SRC PCI REF DOT96 USB
x2 x6 x9 x2 x1
x1
24-48M
x1
Pin Configuration
VSS_PCI
PCI3
*FS_E/PCI4
PCI5
VSS_PCI
VDD_PCI
PCIF0
**FS_A/PCIF1
*FS_B/PCIF2
VDD_48
**SEL24_48#/24_48M
USB48
VSS_48
DOT96T
DOT96C
VTTPWRGD#/PD
SRCT0
SRCC0
VDD_SRC
VSS_SRC
SRCT1
SRCC1
SRCT2
SRCC2
VSS_SRC
SRCT_SATAT
SRCC_SATAC
VDD_SRC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56 VDD_PCI
55 PCI2
54 PCI1
53 PCI0
52 SRESET#
51 REF1/FS_C**
50 REF0/FS_D**
49 VSS_REF
48 XIN
47 XOUT
46 VDD_REF
45 SCLK
44 SDATA
43 CPUT0
42 CPUC0
41 VDD_CPU
40 CPUT1
39 CPUC1
38 VSS_CPU
37 IREF
36 VSSA
35 VDDA
34 VDD_SRC
33 SRCT4
32 SRCC4
31 SRCT3
30 SRCC3
29 VSS_SRC
* Indicates internal pull-up
** Indicates internal pull-down
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07668 Rev. *D
Revised June 13, 2005


Cypress Semiconductor Electronic Components Datasheet

CY28439 Datasheet

Clock Generator

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PRELIMINARY
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Pin Description
Pin No.
Name
Type
Description
6,56 VDD_PCI
PWR 3.3V power supply for outputs.
1,5 VSS_PCI
GND Ground for outputs.
3 FS_E/PCI4 I,O, 3.3V-tolerant input for CPU frequency selection/33-MHz clock.
PU,SE Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
2,4,53,54, PCI
55
O, SE 33-MHz clocks.
7 PCIF0
O,SE 33-MHz free running clock
8
FS_A/PCIF1
I/O,PD, 3.3V-tolerant input for CPU frequency selection/Free running 33-MHz clock.
SE Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
9
FS_B/PCIF2
I/O,PU, 3.3V-tolerant input for CPU frequency selection/Free running 33-MHz clock.
SE Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
16 VTT_PWRGD#/PD I, PD 3.3V LVTTL input. This pin is a level sensitive strobe used to latch the FS_A, FS_B,
FS_C,FS_D, FS_E, SEL24_48. After VTT_PWRGD# (active LOW) assertion, this pin
becomes a real-time input for asserting power down (active HIGH).
10 VDD_48
PWR 3.3V power supply for outputs.
11 SEL24_48#/24_48 I/O, PD, Latched select input for 24-/48-MHz output/ 24-/48-MHz output
M SE 0 = 48 MHz, 1 = 24 MHz
12 USB48
I/O, 48-MHz clock output.
13 VSS_48
GND Ground for outputs.
14,15
DOT96T, DOT96C O, DIF Fixed 96-MHz clock output.
17,18,21,
22,23,24,
30,31,32,
33
SRCT/C
O, DIF Differential serial reference clocks. Outputs have overclocking capability.
19,28,34 VDD_SRC
PWR 3.3V power supply for outputs.
26,27
SRCT/C_SATAT/C O, DIF Differential serial reference clock. Recommended output for SATA.
20,25,29 VSS_SRC
GND Ground for outputs.
35 VDDA
PWR 3.3V power supply for PLL.
36 VSSA
GND Ground for PLL.
37 IREF
I A precision resistor is attached to this pin, which is connected to the internal current
reference.
41 VDD_CPU
PWR 3.3V power supply for outputs.
39,40,42,43 CPUT/C
O, DIF Differential CPU clock outputs.
38 VSS_CPU
GND Ground for outputs.
45 SCLK
I SMBus-compatible SCLOCK.
44 SDATA
I/O SMBus-compatible SDATA.
46 VDD_REF
PWR 3.3V power supply for outputs.
47 XOUT
O, SE 14.318-MHz crystal output.
48 XIN
I 14.318-MHz crystal input.
49 VSS_REF
GND Ground for outputs.
50
REF0/FS_D
I/O, SE, 3.3V-tolerant input for CPU frequency selection/Reference clock. Refer to DC
PD Electrical Specifications table for Vil_FS and Vih_FS specifications.
51
REF1/FS_C
O, SE, 3.3V-tolerant input for CPU frequency selection/Reference clock.
PD Selects test mode if pulled to VIHFS_C when VTT_PWRGD# is asserted low.
Refer to DC Electrical Specifications table for VILFS_C,VIMFS_C,VIHFS_C specifica-
tions.
52 SRESET#
O, SE 3.3V output for Watchdog reset.
This output is open drain type with a high (>100-k) internal pull-up resistor.
Document #: 38-07668 Rev. *D
Page 2 of 22


Part Number CY28439
Description Clock Generator
Maker Cypress Semiconductor
Total Page 22 Pages
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