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CY3128 - CPLD Development Software

Description

: Graphical HDL Block Diagram editor and a library of blocks from Aldec Aldec Active-HDL™ FSM graphical Finite State Machine editor Behavioral VHDL and Verilog (IFTHENELSE; CASE) Boolean Structural Verilog and VHDL Designs can include multi

Features

  • h S a at . D w w w CY3128 Warp Professional™ CPLD Software.
  • Support for all Cypress Programmable Logic Devices.
  • PSI™ (Programmable Serial Interface™).
  • Delta39K™ CPLDs.
  • Quantum38K™ CPLDs.
  • Ultra37000™ CPLDs.
  • FLASH370i™ CPLDs.
  • MAX340™ CPLDs.
  • Industry standard PLDs (16V8, 20V8, 22V10).
  • VHDL and Verilog timing model output for use with third-party simulators.
  • Active-HDL™ Sim Release 4.1 timing simulation from A.

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Datasheet preview – CY3128

Datasheet Details

Part number CY3128
Manufacturer Cypress (now Infineon)
File Size 145.44 KB
Description CPLD Development Software
Datasheet download datasheet CY3128 Datasheet
Additional preview pages of the CY3128 datasheet.

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Full PDF Text Transcription

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8 m o .c U 4 t e e Features h S a at .D w w w CY3128 Warp Professional™ CPLD Software • Support for all Cypress Programmable Logic Devices — PSI™ (Programmable Serial Interface™) — Delta39K™ CPLDs — Quantum38K™ CPLDs — Ultra37000™ CPLDs — FLASH370i™ CPLDs — MAX340™ CPLDs — Industry standard PLDs (16V8, 20V8, 22V10) • VHDL and Verilog timing model output for use with third-party simulators • Active-HDL™ Sim Release 4.
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