Datasheet Details
| Part number | CY37128P100-125AI |
|---|---|
| Manufacturer | Cypress (now Infineon) |
| File Size | 1.55 MB |
| Description | 5V/ 3.3V/ ISR High-Performance CPLDs |
| Datasheet |
 CY37128P100-125AI Datasheet
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General Description
The Ultra37000™ family of CMOS CPLDs provides a range of high-density programmable logic solutions with unparalleled system performance.
The Ultra37000 family is designed to bring the flexibility, ease of use, and performance of the 22V10 to high-density CPLDs.
Key Features
- In-System Reprogrammable™ (ISR™) CMOS CPLDs.
- JTAG interface for reconfigurability.
- Design changes do not cause pinout changes.
- Design changes do not cause timing changes.
- High density.
- 32 to 512 macrocells.
- 32 to 264 I/O pins.
- Five dedicated inputs including four clock pins.
- Simple timing model.
- No fanout delays.
- No expander delays.
- No dedicated vs. I/O pin delays.
- No additional.